參數(shù)資料
型號: EVAL-AD7725CBZ
廠商: Analog Devices Inc
文件頁數(shù): 4/28頁
文件大小: 0K
描述: BOARD EVALUATION FOR AD7725
標(biāo)準(zhǔn)包裝: 1
ADC 的數(shù)量: 1
位數(shù): 16
采樣率(每秒): 900k
數(shù)據(jù)接口: 串行,并聯(lián)
輸入范圍: ±VREF
在以下條件下的電源(標(biāo)準(zhǔn)): 615mW @ 900kSPS
工作溫度: -40°C ~ 85°C
已用 IC / 零件: AD7725
已供物品: 板,CD
相關(guān)產(chǎn)品: AD7725BSZ-ND - IC ADC 16BIT PROG 44MQFP
REV. A
–12–
AD7725
Pin No.
Mnemonic S/P
Description
38
SDO/DB8
Serial Mode. SDO–Serial Data Output. The serial data is shifted out of the AD7725 MSB
first, in twos complement format, synchronous with SCO.
Parallel Mode. DB8–Data Input/Output Bit.
39
DV
DD
Digital Power Supply Voltage.
40
SCO/DB7
Serial Mode. SCO–Serial Clock Output. The frequency of SCO is a function of the CLKIN
frequency and is set by the SCR pin. When configuration data is being loaded into the
AD7725, SCO = f
CLKIN/16.
Parallel Mode. DB7–Data Input/Output Bit.
41
FSI/DB6
Serial Mode. FSI–Frame Synchronization Input. FSI indicates the beginning of a word
transmission on the SDI pin.
Parallel Mode. DB6–Data Input/Output Bit.
42
INIT/DB5
Serial Mode. INIT–Logic Input. When the device is correctly configured, a logic low on this
pin will prevent the device from converting. When this pin is taken high, the device will start
converting. When daisy-chaining multiple devices, this pin ensures that all devices sample their
analog inputs simultaneously without needing to activate the SYNC pin.
Parallel Mode. DB5–Data Input/Output Bit.
43
RESETCFG/DB4
Serial Mode.
RESETCFG–Logic Input. RESETCFG is used to reset the part when a
configuration error occurs. A low pulse on this pin will reset the part, and the configuration
file will be downloaded again. The
SOE pin will go high following a pulse on the RESETCFG
pin and then again following a successful configuration.
Parallel Mode. DB4–Data Input/Output Bit.
44
DGND/DB3
Serial Mode. DGND–Digital Ground.
Parallel Mode. DB3–Data Input/Output Bit.
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