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參數(shù)資料
| 型號： | EVAL-AD7734EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 14/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION FOR AD7734 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 15.4k |
| 數(shù)據(jù)接口： | 串行 |
| 輸入范圍： | ±10 V |
| 在以下條件下的電源（標(biāo)準(zhǔn)）： | 85mW @ 5V |
| 工作溫度： | -40°C ~ 105°C |
| 已用 IC / 零件： | AD7734 |
| 已供物品： | 板，纜線，CD |
| 產(chǎn)品目錄頁面： | 779 (CN2011-ZH PDF) |
| 相關(guān)產(chǎn)品： | AD7734BRUZ-REEL7TR-ND - IC ADC 24BIT 4CH SIG-DEL 28TSSOP AD7734BRUZ-REEL-ND - IC ADC 24BIT 4CH SIG-DEL 28TSSOP AD7734BRUZ-ND - IC ADC 24BIT 4-CH 28-TSSOP AD7734BRU-ND - IC ADC 24BIT 4-CH 28-TSSOP |
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Data Sheet
AD7734
Rev. A | Page 21 of 32
MD2 MD1 MD0 Operating Mode
0
Idle Mode
The default mode after power-on or reset.
The AD7734 automatically returns to this mode after any calibration or after a single conversion.
0
1
Continuous Conversion Mode
The AD7734 performs a conversion on the specified channel. After the conversion is complete, the relevant channel
data register and channel status register are updated, the relevant RDY bit in the ADC status register is set, and the
AD7734 continues converting on the next enabled channel. The part will cycle through all enabled channels until it is
put into another mode or reset. The cycle period will be the sum of all enabled channels’ conversion times, set by the
corresponding channel conversion time registers.
0
1
0
Single Conversion Mode
The AD7734 performs a conversion on the specified channel. After the conversion is complete, the relevant channel
data register and channel status register are updated, the relevant RDY bit in the ADC status register is set, the RDY pin
goes low, the MD2–MD0 bits are reset, and the AD7734 returns to idle mode. Requesting a single conversion ignores
the channel setup register enable bits; a conversion will be performed even if that channel is disabled.
0
1
Power-Down (Standby) Mode
The ADC and the analog front end (internal buffer) go into the power-down mode.
The AD7734 digital interface can still be accessed. The CLKDIS bit works separately, and the MCLKOUT mode is not
affected by the power-down (standby) mode.
1
0
ADC Zero-Scale Self-Calibration Mode
A zero-scale self-calibration is performed on internally shorted ADC inputs.
After the calibration is complete, the contents of the ADC zero-scale calibration register are updated, all RDY bits in the
ADC status register are set, the RDY pin goes low, the MD2–MD0 bits are reset, and the AD7734 returns to idle mode.
1
0
1
For Future Use.
1
0
Channel Zero-Scale System Calibration Mode
A zero-scale system calibration is performed on the selected channel. An external system zero-scale voltage should be
provided at the AD7734 analog input and this voltage should remain stable for the duration of the calibration. After the
calibration is complete, the contents of the corresponding channel zero-scale calibration register are updated, all RDY
bits in the ADC status register are set, the RDY pin goes low, the MD2–MD0 bits are reset, and the AD7734 returns to
idle mode.
1
Channel Full-Scale System Calibration Mode
A full-scale system calibration is performed on the selected channel. An external system full-scale voltage should be
provided at the AD7734 analog input and this voltage should remain stable for the duration of the calibration. After the
calibration is complete, the contents of the corresponding channel full-scale calibration register are updated, all RDY
bits in the ADC status register are set, the RDY pin goes low, the MD2–MD0 bits are reset, and the AD7734 returns to
idle mode.
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