參數(shù)資料
型號： EVAL-AD7794EBZ
廠商： Analog Devices Inc
文件頁數(shù)： 5/37頁
文件大?。?/td> 0K
描述： BOARD EVALUATION FOR AD7794
產(chǎn)品培訓(xùn)模塊： ADC Applications
ADC Architectures
ADC DC/AC Performance
標(biāo)準(zhǔn)包裝： 1
ADC 的數(shù)量： 1
位數(shù)： 24
采樣率（每秒）： 470
數(shù)據(jù)接口： SPI?、QSPI?、MICROWIRE? 和 DSP
輸入范圍： ±VREF/增益
在以下條件下的電源（標(biāo)準(zhǔn)）： 2.5mW @ 470SPS
工作溫度： -40°C ~ 105°C
已用 IC / 零件： AD7794
已供物品： 板，纜線，CD
相關(guān)產(chǎn)品： AD7794CRUZ-REEL-ND - IC ADC 24BIT 6CH LP 24-TSSOP
AD7794CRUZ-ND - IC ADC 24BIT 6CH LP 24-TSSOP
AD7794BRU-ND - IC ADC 24BIT 6CH LP 24-TSSOP
AD7794BRUZ-REEL-ND - IC ADC 24BIT 6CH LP 24-TSSOP
AD7794BRU-REEL-ND - IC ADC 24BIT 6CH LP 24-TSSOP
AD7794BRUZ-ND - IC ADC 24BIT SIG-DEL 6CH 24TSSOP
AD7794/AD7795
Rev. D | Page 12 of 36
Pin No.
Mnemonic
Description
18
AIN4()/REFIN2()
Analog Input/Negative Reference Input. AIN4() is the negative terminal of the differential analog input pair
AIN4(+)/AIN4(). This pin also functions as the negative reference input for REFIN2. This reference input can
lie anywhere between GND and AVDD 0.1 V.
19
PSW
Low-Side Power Switch to GND.
20
GND
Ground Reference Point.
21
AVDD
Supply Voltage, 2.7 V to 5.25 V.
22
DVDD
Serial Interface Supply Voltage, 2.7 V to 5.25 V. DVDD is independent of AVDD. Therefore, the serial interface
operates at 3 V with AVDD at 5 V or vice versa.
23
DOUT/RDY
Serial Data Output/Data Ready Output. DOUT/RDY serves a dual purpose. It functions as a serial data output
pin to access the output shift register of the ADC. The output shift register can contain data from any of the
on-chip data or control registers. In addition, DOUT/RDY operates as a data ready pin, going low to indicate
the completion of a conversion. If the data is not read after the conversion, the pin goes high before the
next update occurs. The DOUT/RDY falling edge can also be used as an interrupt to a processor, indicating
that valid data is available. With an external serial clock, the data can be read using the DOUT/RDY pin. With
CS low, the data/control word information is placed on the DOUT/RDY pin on the SCLK falling edge and is
valid on the SCLK rising edge.
24
DIN
Serial Data Input to the Input Shift Register on the ADC. Data in this shift register is transferred to the control
registers within the ADC with the register selection bits of the communications register identifying the
appropriate register.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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