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參數(shù)資料
| 型號： | EVAL-ADF4360-2EBZ1 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 5/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION FOR ADF4360-2 |
| 標準包裝： | 1 |
| 主要目的： | 計時，頻率合成器 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | ADF4360-2 |
| 主要屬性： | 帶 VCO 的單路整數(shù)-N PLL |
| 次要屬性： | 2GHz，200kHz PFD |
| 已供物品： | 板，線纜，軟件 |
| 相關(guān)產(chǎn)品： | ADF4360-2BCPZRL7-ND - IC SYNTHESIZER VCO 24LFCSP ADF4360-2BCPZRL-ND - IC SYNTHESIZER VCO 24LFCSP ADF4360-2BCPZ-ND - IC SYNTHESIZER/VCO 24-LFCSP |
Data Sheet
ADF4360-2
Rev. C | Page 13 of 24
Table 7. Control Latch
DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
C2 (0) C1 (0)
PC1
PC2
CR
M1
M2
PDP
CP
CPG
MTLD
PL1
PL2
CPI1
CPI2
CPI3
CPI4
CPI5
CPI6
PD1
M3
CONTROL
BITS
MUXOUT
CONTROL
CURRENT
SETTING 2
CURRENT
SETTING 1
PRESCALER
VALUE
CORE
POWER
LEVEL
OUTPUT
POWER
LEVEL
DB21
DB22
DB23
PO
W
ER
-
DO
W
N
2
PO
W
ER
-
DO
W
N
1
CO
UNT
E
R
ES
ET
M
U
TE
-TI
LL-
LD
C
P
GA
IN
CP
T
HRE
E
-
S
TA
TE
P
HAS
E
D
ET
EC
T
OR
P
OLA
R
IT
Y
PD2
P1
P2
CR
0
1
COUNTER
OPERATION
NORMAL
R, A, B COUNTERS
HELD IN RESET
PC2
0
1
0
CORE POWER LEVEL
5mA
10mA
15mA
PC1
0
1
20mA
CP
0
1
CHARGE PUMP
OUTPUT
NORMAL
THREE-STATE
PDP
0
1
PHASE DETECTOR
POLARITY
NEGATIVE
POSITIVE
CPG
0
1
CP GAIN
CURRENT SETTING 1
CURRENT SETTING 2
MTLD
0
1
MUTE-TILL-LOCK DETECT
DISABLED
ENABLED
M3
M2
M1
OUTPUT
THREE-STATE OUTPUT
0
1
0
1
0
1
0
1
0
1
0
1
DIGITAL LOCK DETECT
(ACTIVE HIGH)
N DIVIDER OUTPUT
DVDD
R DIVIDER OUTPUT
N-CHANNEL OPEN-DRAIN
LOCK DETECT
SERIAL DATA OUTPUT
DGND
P2
P1
PRESCALER VALUE
0
8/9
0
1
16/17
1
0
32/33
1
32/33
CE PIN
PD2
PD1
MODE
0
X
ASYNCHRONOUS POWER-DOWN
1
X
0
NORMAL OPERATION
1
0
1
ASYNCHRONOUS POWER-DOWN
1
SYNCHRONOUS POWER-DOWN
CPI6
CPI5
CPI4
ICP(mA)
CPI3
CPI2
CPI1
4.7k
0.31
0.62
0.93
1.25
1.56
1.87
2.18
2.50
0
1
0
1
0
1
0
1
0
1
0
1
0
1
PL2
PL1
OUTPUT POWER LEVEL
CURRENT
POWER INTO 50
(USING 50 TO VVCC)
–13dBm
–11dBm
–8dBm
–6dBm
0
1
0
1
0
1
3.5mA
5.0mA
7.5mA
11.0mA
04436-
017
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