參數(shù)資料
型號： FA3687V
廠商： FUJI ELECTRIC CO LTD
元件分類： 穩(wěn)壓器
英文描述： 0.4 A DUAL SWITCHING CONTROLLER, 1500 kHz SWITCHING FREQ-MAX, PDSO16
封裝： 1.10 MM HEIGHT, TSSOP-16
文件頁數(shù)： 12/18頁
文件大小： 378K
代理商： FA3687V
FA3687V
3
Soft start section (CS1, CS2 pin)
Item
Symbol
Test condition
Min.
Typ.
Max.
Unit
Threshold voltage (CS1)
VCS1D0N
Duty cycle=0%, VFB1=1.4V
0.82
V
(Driving Nch-MOSFET)
VCS1D20N
Duty cycle=20%, VFB1=1.4V
0.89
0.925
0.96
V
VCS1D80N
Duty cycle=80%, VFB1=1.4V
1.25
1.285
1.32
V
VCS1D100N
Duty cycle=100%, VFB1=1.4V
1.38
V
Threshold voltage (CS1)
VCS1D0P
Duty cycle=0%, VFB1=1.4V
0.82
V
(Driving Pch-MOSFET)
VCS1D20P
Duty cycle=20%, VFB1=1.4V
0.90
0.935
0.97
V
VCS1D80P
Duty cycle=80%, VFB1=1.4V
1.26
1.295
1.33
V
VCS1D100P
Duty cycle=100%, VFB1=1.4V
1.38
V
Threshold voltage (CS2)
VCS2D0N
Duty cycle=0%, VFB2=0.7V
1.33
V
(Driving Nch-MOSFET)
VCS2D20N
Duty cycle=20%, VFB2=0.7V
1.21
1.245
1.28
V
VCS2D80N
Duty cycle=80%, VFB2=0.7V
0.85
0.885
0.92
V
VCS2D100N
Duty cycle=100%, VFB2=0.7V
0.80
V
Threshold voltage (CS2)
VCS2D0P
Duty cycle=0%, VFB2=0.7V
1.33
V
(Driving Pch-MOSFET)
VCS2D20P
Duty cycle=20%, VFB2=0.7V
1.20
1.23
1.27
V
VCS2D80P
Duty cycle=80%, VFB2=0.7V
0.84
0.875
0.91
V
VCS2D100P
Duty cycle=100%, VFB2=0.7V
0.80
V
Error amplifier section (IN1–, FB1, IN2–, IN2+, FB2 pin)
Item
Symbol
Test condition
Min.
Typ.
Max.
Unit
Reference voltage (ch.1)
VREF1
*
0.99
1.00
1.01
V
VREF1
Line regulation (ch.1)
VREF_LINE
VCC=2.5 to 18V
±2
±5
mV
VREF1
Variation with temperature (ch.1)
VREF_TC1
Ta= –30 to +85C
±0.5
%
Input offset voltage (ch.2)
VOFFSET
VIN2+=1.0V, IN2+, IN2–
±10
mV
VOFFSET
Line regulation (ch.2)
VOFF_LINE
VCC=2.5 to 18V
0
mV
Input bias current
IIN–
VINx– =0.0 to 2.5V
0.0
mA
Common mode input voltage
VCOM
IN2+, IN2–
0.7
1.5
V
Open loop gain
AVO
70
dB
Unity gain bandwidth
fT
1.5
MHz
Output current (sink)
ISIFB
VFB1=0.5V, VIN1– =VREG
2.3
3.5
4.7
mA
VFB2=0.5V, VIN2– =VREG, VIN2+=1V
Output current (source)
ISOFB
VFB1=VREG–0.5V, VIN1– =0V
–360
–270
–180
A
VFB2=VREG–0.5V, VIN2– =0V, VIN2+ =1V
* The FB1 voltage is measured under the condition that IN1- pin and FB1 pin are shorted. The input offset voltage of the error amplifier is included.
Pulse width modulation (PWM) section (FB1, FB2 pin)
Item
Symbol
Test condition
Min.
Typ.
Max.
Unit
Threshold voltage (FB1)
VFB1D0N
Duty cycle=0%, VCS1=VREG
0.82
V
(Driving Nch-MOSFET)
VFB1D20N
Duty cycle=20%, VCS1=VREG
0.925
V
VFB1D80N
Duty cycle=80%, VCS1=VREG
1.285
V
VFB1D100N
Duty cycle=100%, VCS1=VREG
1.38
V
Threshold voltage (FB1)
VFB1D0P
Duty cycle=0%, VCS1=VREG
0.82
V
(Driving Pch-MOSFET)
VFB1D20P
Duty cycle=20%, VCS1=VREG
0.935
V
VFB1D80P
Duty cycle=80%, VCS1=VREG
1.295
V
VFB1D100P
Duty cycle=100%, VCS1=VREG
1.38
V
Threshold voltage (FB2)
VFB2D0N
Duty cycle=0%, VCS2=0V
1.33
V
(Driving Nch-MOSFET)
VFB2D20N
Duty cycle=20%, VCS2=0V
1.245
V
VFB2D80N
Duty cycle=80%, VCS2=0V
0.885
V
VFB2D100N
Duty cycle=100%, VCS2=0V
0.80
V
Threshold voltage (FB2)
VFB2D0P
Duty cycle=0%, VCS2=0V
1.33
V
(Driving Pch-MOSFET)
VFB2D20P
Duty cycle=20%, VCS2=0V
1.235
V
VFB2D80P
Duty cycle=80%, VCS2=0V
0.875
V
VFB2D100P
Duty cycle=100%, VCS2=0V
0.80
V
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