參數(shù)資料
型號(hào): FA3687V
廠商: FUJI ELECTRIC CO LTD
元件分類: 穩(wěn)壓器
英文描述: 0.4 A DUAL SWITCHING CONTROLLER, 1500 kHz SWITCHING FREQ-MAX, PDSO16
封裝: 1.10 MM HEIGHT, TSSOP-16
文件頁(yè)數(shù): 5/18頁(yè)
文件大小: 378K
代理商: FA3687V
FA3687V
13
5. PWM comparator
The PWM output generates from the oscillator output, the error
amplifier output (FB1, FB2) and CS voltage (CS1, CS2) (Fig. 4).
The oscillator output is compared with the preferred lower
voltage between FB1 and CS1 for ch1. While the preferred
voltage is lower than oscillator output, the PWM output is low.
While the preferred voltage is higher than oscillator output, the
PWM output is high. Since the phase of Ch2 is the opposite
phase of Ch1, higher voltage between FB2 and CS2 is
preferred and while the preferred voltage is lower than the
oscillator output, the PWM output 2 is high. (Cannot be
observed externally) The output polarity of OUT1, OUT2
changes according to the condition of SEL pin. (See Fig. 6)
6. Soft start function
This IC has a soft start function to protect DC-to-DC converter
circuits from damage when starting operation. CS1 pin (Pin10),
and CS2 pin (Pin7) are used for soft start function of ch1 and
ch2 respectively (Fig. 5). When the supply voltage is applied to
the VCC pin and UVLO is cancelled, capacitor CCS1 and CCS2
is charged by VREG through the resistor R7 or R9. Therefore,
CS1 voltage gradually increases and CS2 voltage gradually
decreases. Since CS1 and CS2 pin are connected to the PWM
comparator internally, the pulses gradually widen and then the
soft start function operates (Fig. 6).
The maximum duty cycle can be set by using the CS pins.
(See “Design advice” about the detail)
Fig. 4
Fig. 5
Fig. 6
N/P ch.
drive
N/P ch.
drive
UVLO
Oscillator
output
CS1
CS2
FB2
FB1
OUT1
OUT2
PWM
Comp.1
PWM
Comp.2
PWM output1
9
8
SEL1
16
SEL2
2
PWM output2
13
10
CS1
VREG
CCS1
R7
13
7
VREG
CS2
R9
CCS2
Oscillator output
CS1 pin voltage
Er. Amp.1 output
PWM
output 1
OUT1
Pch.drive
(SEL1:VREG)
OUT1
Nch.drive
(SEL1:GND)
Oscillator output
CS2 pin voltage
Er. Amp.2 output
PWM
output2
OUT2
Pch.drive
(SEL2:VREG)
OUT2
Nch.drive
(SEL2:GND)
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