
FAN5240
PRODUCT SPECIFICATION
10
REV. 1.0.2 10/10/01
Current Limit
The converter senses the voltage across the low-side N-chan-
nel MOSFET (from the SW pin to ground) and compares it
to the voltage across a resistor from SW to the ISNS pins.
If the voltage drop exceeds the setpoint, the controller begins
skipping pulses, returning to normal operation when the load
current returns to normal. Although pulse-skipping limits the
output current, it could still be almost double the normal
maximum due to variations in the MOSFET sensing. To
further protect the converter, a time delay circuit has been
added. If the pulse skipping continues for more than 8 clock
cycles, the converter shuts down. In the extreme case where
the load short is so hard that the output voltage drops below
its under-voltage threshold, the chip immediately shuts
down.
Selection of a current-limit resistor must include the toler-
ance of the current-limit trip point, the MOSFET RDS,on
tolerance and temperature coefcient, and the ripple current,
in addition to the maximum output current.
Example: Maximum DC output current on the CPU is 24A,
and the inductor is 1.0H at this current. The MOSFET has
RDS,on = 7.5m at VGS = 4.5V, and will be running at
100°C, at which its resistance is 30% higher than at 25°C.
Peak current is DC output current plus peak ripple current:
where T is the maximum period, VO is output voltage, and
L is the inductance. The voltage across the MOSFET at this
current is
The current source driving the external resistor is 100A
minimum, so we must use
Activation of current limit is delayed by a time set by the
capacitor on the DELAY pin. The delay time is
approximately equal to 1/10 of the Power Good delay time.
UVLO
When the input voltage falls below the UVLO threshold,
the FAN5240 turns itself off. The UVLO has hysteresis to
prevent startup oscillation.
Softstart Timing
Softstart of the converter is accomplished by attaching a
capacitor to the SS pin. When the controller starts, a 25A
current is sourced from this pin. This limits the duty cycle
of the converter, controlling the rate of rise of the output
voltage. When the SS pin reaches 900mV, the current source
is increased to 300A. The outputs then quickly rise to their
nal values.
Example: To get approximately a 1msec softstart, select a
capacitor.
During mode-change of the CPU converter (dynamic
reprogramming of the output voltage), the softstart current
remains at 300A, permitting rapid change of the output
voltage.
This two slope approach provides slow and safe rise of
voltages and currents in the converter during startup, and at
the same time sets a controlled speed of the core voltage
change during mode-change.
Light Load Mode
Because the converter is a synchronous buck, it can operate
in two quadrants, which means that the ripple current is a
constant independent of the load current. At light loads, this
ripple current translates into poor efciency, since it causes
circulating current losses in the MOSFETs. To optimize the
efciency at light loads, then, the FAN5240 switches from
normal operation to a special light load mode when the
current is low. The light load change occurs when the
on-state drain-source voltage is less than about 17mV.
In light load mode, the FAN5240 automatically switches
from PWM (pulse width modulation) to PFM (pulse
frequency modulation), which reduces the gate drive current.
It also turns off the low side drive completely, which further
saves on gate current. In PFM mode, the converter operates
non-synchronously, using the output schottky. However, it
maintains synchronization with the oscillator, allowing a
seamless transition between modes and a well-controlled
noise spectrum. Droop output voltage is also maintained.
Change between the modulation schemes is delayed by two
clock cycles to prevent oscillation in mode change at near
threshold levels. By pulling the FPWM pin high, the
FAN5240 will remain in PWM mode regardless of load
current.
Mode Change
As soon as a DAC code change is received, the chip is
forced into PWM mode, even if it was in PFM mode, for
approximately 150sec regardless of load level. Operating
the controller in the synchronous PWM mode allows faster
output voltage transitions, especially when a downward
output voltage change is commanded.
I
pk
I
DC
TV
o
2L
----------
+24A
4
sec 1.4V
×
21H
×
---------------------------------
+
26.8A
==
=
VI
pk
R
DS,on
×
TC
×
26.8A
7.5m
×
1.3
×
==
261mV
=
R
V
I
----
≥
261mV
100
A
------------------
2.6k
==
C
It
V
----
25
A 1msec
×
1V
------------------------------------
25nF
==
=