參數(shù)資料
型號： FR65E
廠商： Fujitsu Limited
英文描述： 32-Bit Microcontroller
中文描述： 32位微控制器
文件頁數(shù)： 7/87頁
文件大小： 369K
代理商： FR65E
MB91307B
7
(Continued)
Pin no.
Pin name
I/O
circuit type
Description
38
SDA
Q
SDA: I
2
C bus input/output port. This function is valid when I
2
C operation
is enabled. When the I
2
C bus is in use, the port output must be set to
Hi-Z level. When the I
2
C bus is in use, this is an open drain pin.
PH6: General purpose input/output port.
SCL: I
2
C bus input/output port. This function is valid when I
2
C operation
is enabled. When the I
2
C bus is in use, the port output must be set to
Hi-Z level. When the I
2
C bus is in use, this is an open drain pin.
PH7: General purpose input/output port.
DREQ2: DMA external transfer request input. When selected as a DMA
startup source, this input is in use at all times, so that output from other
functions must be stopped unless used intentionally.
PG0: General purpose input/output port.
DACK2: DMA external transfer request acknowledge output. This
function is valid when the DMA transfer request acknowledge output
setting is enabled.
PG1: General purpose input/output port. This function is valid when the
DMA transfer request acknowledge output setting is enabled.
DEOP2: DMA external transfer end output. This function is valid when
the DMA external transfer end output setting is enabled.
DSTP2: DMA external transfer stop input. This function is valid when the
DMA external transfer stop input setting is enabled.
PG2: General purpose input/output port. This function is valid when the
DMA external transfer end output selection and the DMA external
transfer stop input selection are disabled.
Mode pins 2-0. The setting of these two pins determines the basic
operating mode. They should be connected to V
cc
or V
ss
.
DREQ0: DMA external transfer request input. When selected as a DMA
startup source, this input is in use at all times, so that output from other
functions must be stopped unless used intentionally.
PB0: General purpose input/output port.
DACK0: DMA external transfer request acknowledge output. This
function is valid when the DMA transfer request acknowledge output
setting is enabled.
PB1: General purpose input/output port. This function is enabled when
the DMA transfer request acknowledge output setting is disabled.
DEOP2: DMA external transfer end output. This function is valid when
the DMA external transfer end output setting is enabled.
DSTP0: DMA external transfer stop input. This function is valid when the
DMA external transfer stop input setting is enabled.
PB2: General purpose input/output port. This function is valid when the
DMA external transfer end output selection and the DMA external
transfer stop input selection are disabled.
PH6
39
SCL
Q
PH7
40
DREQ2
F
PG0
41
DACK2
F
PG1
42
DEOP2
F
DSTP2
PG2
43 to 45
MD2 to MD0
G
46
DREQ0
F
PB0
47
DACK0
F
PB1
48
DEOP0
F
DSTP0
PB2
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