- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄382968 > FS6128-06 (Electronic Theatre Controls, Inc.) PLL CLOCK GENERATOR IC WITH VCXO PDF資料下載
參數(shù)資料
| 型號： | FS6128-06 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | PLL CLOCK GENERATOR IC WITH VCXO |
| 中文描述： | 鎖相環(huán)時鐘發(fā)生器IC與石英振蕩器 |
| 文件頁數(shù)： | 2/7頁 |
| 文件大?。?/td> | 65K |
| 代理商： | FS6128-06 |
AMERICAN MICROSYSTEMS, INC.
April 2000
2
4.24.00
FS6128-04 / FS6128-05 / FS6128-06
PLL Clock Generator IC with VCXO
ISO9001
Table 2: Pin Descriptions
Key: AI = Analog Input; AO = Analog Output; DI = Digital Input; DI
U
= Input with Internal Pull-Up; DI
D
= Input with Internal Pull-Down; DIO = Digital Input/Output; DI-3 = Three-Level Digital Input,
DO = Digital Output; P = Power/Ground; # = Active Low pin
PIN
TYPE
NAME
DESCRIPTION
1
AI
XIN
VCXO Feedback
2
P
VDD
Power Supply (+3.3V)
3
AI
XTUNE
VCXO Tune
4
P
VSS
Ground
5
DO
CLK
Clock Output
6
-
n/c
No Connection
7
DO
VSS
Ground
8
AO
XOUT
VCXO Drive
3.0 Functional Block Description
3.1
Voltage-Controlled Crystal
Oscillator (VCXO)
The VCXO provides a tunable, low-jitter frequency refer-
ence for the rest of the FS6128 system components.
Loading capacitance for the crystal is internal to the
FS6128. No external components (other than the reso-
nator itself) are required for operation of the VCXO.
Continuous fine-tuning of the VCXO frequency is accom-
plished by varying the voltage on the XTUNE pin. The
value of this voltage controls the effective capacitance
presented to the crystal. The actual amount that this load
capacitance change will alter the oscillator frequency de-
pends on the characteristics of the crystal as well as the
oscillator circuit itself.
It is important that the crystal load capacitance is speci-
fied correctly to “center” the tuning range. See Table 5.
A simple formula to obtain the “pulling” capability of a
crystal oscillator is:
×
=
(
+
)
(
) (
×
)
C
C
C
C
C
C
C
×
ppm
f
L
L
L
L
1
0
2
0
6
1
2
1
2
10
+
)
(
×
where:
C
0 =
the shunt (or holder) capacitance of the crystal
C
1 =
the motional capacitance of the crystal
C
L1
and C
L2
= the two extremes (minimum and maximum)
of the applied load capacitance presented by the
FS6128.
EXAMPLE: A crystal with the following parameters is
used: C
1
= 0.025pF and C
0
= 6pF. Using the minimum
and maximum C
L1
= 10pF, and C
L2
= 20pF, the tuning
range (peak-to-peak) is:
(
(
) (
20
6
2
×
+
×
)
)
ppm
.
f
300
10
6
106
10
20
025
0
=
+
×
×
=
.
3.2
The on-chip PLL is a standard frequency- and phase-
locked loop architecture. The PLL multiplies the reference
oscillator frequency to the desired output frequency by a
ratio of integers. The frequency multiplication is exact
with a zero synthesis error (unless otherwise specified).
Phase-Locked Loop (PLL)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| FS6128-07 | PLL Clock Generator IC with VCXO |
| FS6209 | DUAL PLL VCXO CLOCK GENERATOR IC |
| FS6209-01 | CAP 0.022UF 25V 10% X7R SMD-0603 TR-7-PA 5K/REEL |
| FS6217-01 | DUAL PLL CLOCK GENERATOR IC |
| FS6232-01 | TWO WAY MP MOTHERBOARD CLOCK GENERATOR IC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| FS6128-07 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PLL Clock Generator IC with VCXO |
| FS6128-07-XTD | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 VCXO CLOCK 27MHZ OUTPUT RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| FS6128-07-XTP | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 VCXO CLOCK 27MHZ RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| FS6131 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Programmable Line Lock Clock Generator IC |
| FS6131_08 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Programmable Line Lock Clock Generator IC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。