參數(shù)資料
型號: FX980L6
廠商: CML MICROSYSTEMS PLC
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 51/86頁
文件大?。?/td> 821K
代理商: FX980L6
TETRA Baseband Processor
FX980
1997 Consumer Microcircuits Limited
55
D/980/3
TxIQGainMult
Title:
Transmit I and Q channel Gain Multiplier registers
Address:
$0x42, $0x43 , $0x48 and $0x49 (4 locations)
Function:
RW
Description:
A 2s-complement multiplication is performed on the magnitude of the Tx Data path signal and
the result is then re-normalised to the system’s dynamic range: thus the function may be
considered as a digital attenuator. This register sets the multiplier, the result being given by the
formula:
D
G
2
out
in
val
11
=
Where:
Din
Dout
G
val
is the signal input,
is the signal output,
is the value in the register.
Bit
Name
Active State
Function
Address $0x42
7:0
TxIGainLSB
Data RW
Least significant 8 bits of the TxIGain register (G
val).
Address $0x43
7:3
RW
Reserved. Set these bits Low. Undefined on read.
2:0
TxIGainMSB
Data RW
Most significant 3 bits of the TxIGain register (G
val).
Address $0x48
7:0
TxQGainLSB
Data RW
Least significant 8 bits of the TxQGain register (G
val).
Address $0x49
7:3
RW
Reserved. Set these bits Low. Undefined on read.
2:0
TxQGainMSB
Data RW
Most significant 3 bits of the TxQGain register (G
val).
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