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參數(shù)資料
| 型號： | GM5115 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | ONPANEL LCD PANEL CONTROLLER |
| 中文描述： | ONPANEL液晶顯示器控制器 |
| 文件頁數(shù)： | 28/58頁 |
| 文件大小： | 1505K |
| 代理商： | GM5115 |
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***
Genesis Microchip Confidential ***
gm5115/25 Preliminary Data Sheet
June 2002
19
C5115-DAT-01H
4.3.4 Sampling Phase Adjustment
The programmable ADC sampling phase is adjusted by delaying the HSYNC input to the SDDS.
The accuracy of the sampling phase is checked and the result read from a register. This feature
enables accurate auto-adjustment of the ADC sampling phase.
4.3.5 ADC Capture Window
Figure 12 below illustrates the capture window used for the ADC input. In the horizontal
direction the capture window is defined in IP_CLKs (equivalent to a pixel count). In the vertical
direction it is defined in lines.
All the parameters beginning with “Source” are programmed gm5115/25 registers values. Note
that the Input Vertical Total is solely determined by the input and is not a programmable
parameter.
Reference
Point
I
S
S
V
Source Horizontal Total (pixels)
Source
Hstart
Source Width
Capture Window
Figure 12.
ADC Capture Window
The Reference Point marks the leading edge of the first internal HSYNC following the leading
edge of an internal VSYNC. Both the internal HSYNC and the internal VSYNC are derived
from external HSYNC and VSYNC inputs.
Horizontal parameters are defined in terms of single pixel increments relative to the internal
horizontal sync. Vertical parameters are defined in terms of single line increments relative to the
internal vertical sync.
For ADC interlaced inputs, the gm5115/25 may be programmed to automatically determine the
field type (even or odd) from the VSYNC/HSYNC relative timing. See Input Format
Measurement, Section 4.6.
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