參數(shù)資料
型號(hào): GM5115
廠商: Electronic Theatre Controls, Inc.
英文描述: ONPANEL LCD PANEL CONTROLLER
中文描述: ONPANEL液晶顯示器控制器
文件頁(yè)數(shù): 40/58頁(yè)
文件大?。?/td> 1505K
代理商: GM5115
***
Genesis Microchip Confidential ***
gm5115/25 Preliminary Data Sheet
June 2002
31
C5115-DAT-01H
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The gm5115/25 features an integrated timing controller (TCON) that connects directly to
commercially available row and column drivers. It supports either 18 or 24-bits per pixel in 1 or
2 pixels per clock XGA operation. Also, it supports single or dual-edge clocking modes. Frame,
Line (Row) and pixel inversion is available for better image quality. In-Line inversion reduces
power consumption and EMI radiation. Data signals have programmable drive strength.
During panel power-up the TCON control signals can be held inactive. This is to provide correct
power sequencing that does not damage the panel. The TCON control signals only become active
when the panel power sequencing is complete.
4.13.1 Programmable Column Driver Interface
The gm5115/25 column driver interface is highly programmable. gm5115 supports dual bus /
dual port, dual bus / one port (both interleave and bank) as well as single bus / single port for
XGA column drivers. gm5125 supports dual bus / dual port and dual bus / one port (both
interleave and bank) for SXGA column drivers.
The column driver interface consists of the following signals:
OCLK/ECLK
– Odd/Even Column Driver bus clock. OCLK and ECLK have a programmable
phase control (0-7ns) and programmable polarities. Even output data bus (ERGB) can be skewed
clock (early) to reduce the number of outputs switching simultaneously.
OSP/ESP
– Odd/Even Starting Pulse. OSP and ESP have programmable positioning before valid
data. They also have programmable polarities.
ORGB[24]/ERGB[24]
– Odd/Even 24 bits data bus supports 24 or 18 bits per pixel in 1 or 2
pixels per clock. These signals support even/odd, red/blue and data bit swap. They also have
programmable group and inter-group delays (0-7ns).
OPOL/EPOL
– Odd/Even polarity. With programmable position of OPOL/EPOL, the
OPOL/EPOL can be switched when LP is active or before or after LP.
OINV/EINV
– Odd/Even data transition inversion. These signals provide data inversion
capability to reduce electromagnetic interference (EMI). One INV signal can be used (either
EINV or OINV), or both.
LP
– Load/Latch pulse. The Load/Latch pulse has a programmable width and polarity.
SHC –
Output circuit control. This signal has programmable timing similar to OPOL/EPOL. It is
optionally available on GPIO6.
TDIV –
Horizontal timing. This signal rises with LP and has a programmable falling edge. It is
optionally available on GPIO7.
All signals OCLK, ECLK, ORGB, ERGB, OSP, ESP, OPOL, EPOL, OINV, EINV have
programmable drive strengths and can be disabled.
Clocks (OCLK/ECLK), Polarities (EPOL/OPOL) and Data (ERGB/ORGB, ESP/OSP) can be
blanked separately, during horizontal and/or vertical blanking period (programmable) to reduce
power. Clocks and Polarities are forced to zero and Data (ERGB/ORGB) is forced to either white
or black during blanking period.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GM5115-H 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ONPANEL LCD PANEL CONTROLLER
GM5120 制造商:未知廠家 制造商全稱:未知廠家 功能描述:XGA/SXGA LCD Controller
GM5120-H 制造商:未知廠家 制造商全稱:未知廠家 功能描述:XGA/SXGA LCD Controller
GM5125 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ONPANEL LCD PANEL CONTROLLER
GM5125-H 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ONPANEL LCD PANEL CONTROLLER