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14
GP2000 – GPS CHIPSET DESIGNER’S GUIDE
GPS ARCHITECT SIGNAL PROCESSING ALGORITHMS
CODE ACQUISITION AND TRACKING
For signal acquisition to occur, both the GP2021 code phase
and carrier frequency must match the incoming code phase and
carrier frequency to such an extent that the resultant correlation
is above the detection threshold.
GPS Architect performs a search in the code phase/carrier
frequency plane by searching across all code phases at a se-
ries of frequency bins until the signal is detected.
Once signal detection occurs, the code and carrier tracking
loops are closed.
Code tracking is achieved using a Phase Locked Loop. Car-
rier tracking is achieved using a Frequency Locked Loop.
The carrier tracking loop aids the code tracking loop.
Code Search
GPS Architect uses a sliding-replica search for code acquisi-
tion.
The GP2021 code DCO is programmed to a slightly higher
chip rate than the predicted rate so that the codes ‘slide’ past
each other with time.
The default programmed offset gives a search rate of 025
chips per millisecond. Hence, a complete code search (1023
chips) at a given frequency takes about 4 seconds to complete.
The frequency bins are 500Hz wide. Therefore, to search a fre-
quency space of
±1025kHz takes about 164 seconds to complete.
Code Lock
The current correlation power is given by the sum of the
squares of the in-phase and quadrature accumulations.
Correlation power =
(I
21Q2)
When the instantaneous value of
(I
21Q2) exceeds a fixed
threshold above the noise floor, signal detection is declared. A
filtered version of (I
21Q2) is then monitored for continued
code lock.
The accumulator noise floor is determined from the product
of the samples from the GP2010 output with the output from
GP2021 carrier DCOs.
The effect of code phase error and carrier frequency error on
the correlation power level has to be included in the determination
of the code lock threshold.
Code Lock Indicator - Noise Floor
The GP2010 has the distribution at its output as given in
Table 1:
The carrier DCOs have the following distribution over 1 cycle:
1
2
1
2
1
2
1
2
1
The noise floor for one accumulator
(I
21Q2) is given by
the mean square of the product of the above two sequences
(taking into account the GP2010 distribution) times the number
of samples over one millisecond.
(I
21Q2) = (225303125307)340/731000
= 48,571
Therefore, the noise floor,
(I
21Q2) = 2348,751 = 97,142
Code Lock Indicator Acquisition Threshold
The noise floor with no signal present is 97,142. For reliable
acquisition, the minimum post-detection SNR will be about 6dB.
This corresponds to an acquisition threshold,
TA, of:
TA = 97,142310
06 = 386,729
The correlation power degrades as a function of a code phase
error,
D
c chips, by:
Correlation loss = 20log
(12Dc)
Therefore, for
Dc = 025 chips, correlation loss = 25dB.
The correlation power degrades as a function of a carrier
frequency error, Df Hz, by:
Therefore, for
Df = 250Hz (500Hz/2), correlation loss = 09dB
Therefore, including the above losses,
TA = 97,142310
026 = 176,769
Code Tracking Loop
GPS Architect uses an Early-Minus-Late discriminator for
code tracking. The Track arm of the correlator is set 1/2 chip
early of the Prompt arm. The code phase error is then given by:
EML = (IT
21QT 2)2(IP 21QP 2)
i.e., when the loop is locked the Track arm will be nominally
1/4 chip early and the Prompt arm 1/4 chip late of the actual, but
physically non-existent, prompt or on-time code.
The code tracking loop uses a second order Phase Locked
Loop. (Note: this can be a first order PLL when used with carrier
aiding).
The open-loop transfer function is:
Y(s)/X(s) = G(s) = (T2s11)/T1s
where
T1>T2>0
or, rearranging:
T1s3Y(s) = (T2s11)3X(s)
Fig. 14 Code lock indicator – noise floor
Level
Percentage of time
15
35
15
1
3
1
2
1
2
3
Table 1
~
sin (pDfT)
pDfT
!
Correlation loss = 20log
–2000
–2500
–1500
1000 1500 2000 2500
2500
2000
1500
1000
–1500
–1000
–2000
–2500
Q
I
IQ DIAGRAM FOR NO SIGNAL
659 POINTS
1ms INTEGRATION PERIOD
MEAN SQUARE = 94, 161