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參數(shù)資料
| 型號： | GS8161E18GT-166I |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | SRAM |
| 英文描述： | 1M X 18 CACHE SRAM, 7 ns, PQFP100 |
| 封裝： | TQFP-100 |
| 文件頁數(shù)： | 21/36頁 |
| 文件大小： | 935K |
| 代理商： | GS8161E18GT-166I |
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GS8161E18(T/D)/GS816132(D)/GS816136(T/D)
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 2.14 3/2005
28/36
1999, GSI Technology
JTAG TAP Instruction Set Summary
Instruction
Code
Description
Notes
EXTEST
000
Places the Boundary Scan Register between TDI and TDO.
1
IDCODE
001
Preloads ID Register and places it between TDI and TDO.
1, 2
SAMPLE-Z
010
Captures I/O ring contents. Places the Boundary Scan Register between TDI and
TDO.
Forces all RAM output drivers to High-Z.
1
RFU
011
Do not use this instruction; Reserved for Future Use.
Replicates BYPASS instruction. Places Bypass Register between TDI and TDO.
1
SAMPLE/
PRELOAD
100
Captures I/O ring contents. Places the Boundary Scan Register between TDI and
TDO.
1
GSI
101
GSI private instruction.
1
RFU
110
Do not use this instruction; Reserved for Future Use.
Replicates BYPASS instruction. Places Bypass Register between TDI and TDO.
1
BYPASS
111
Places Bypass Register between TDI and TDO.
1
Notes:
1. Instruction codes expressed in binary, MSB on left, LSB on right.
2. Default instruction automatically loaded at power-up and in test-logic-reset state.
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| GS8161E18T-133 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs |
| GS8161E18T-133I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs |
| GS8161E18T-150 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs |
| GS8161E18T-150I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs |
| GS8161E18T-166 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs |
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