參數(shù)資料
型號(hào)： GS8161Z36AGT-275I
廠商： GSI TECHNOLOGY
元件分類： SRAM
英文描述： 512K X 36 ZBT SRAM, 5.25 ns, PQFP100
封裝： TQFP-100
文件頁數(shù)： 15/40頁
文件大小： 1178K
代理商： GS8161Z36AGT-275I
Rev: 1.02a 9/2002
14/32
2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS8161Z18/36AT-300/275/250/225/200
Preliminary
Power Supply Voltage Ranges
Parameter
Symbol
Min.
Typ.
Max.
Unit
Notes
2.5 V Supply Voltage
VDD2
2.3
2.5
2.7
V
1.8 V Supply Voltage
VDD1
1.6
1.8
2.0
V
2.5 V VDDQ I/O Supply Voltage
VDDQ2
2.3
2.5
2.7
V
1.8 V VDDQ I/O Supply Voltage
VDDQ1
1.6
1.8
2.0
V
Notes:
1.
The part numbers of Industrial Temperature Range versions end the character “I”. Unless otherwise noted, all performance specifications quoted are
evaluated for worst case in the temperature range marked on the device.
2.
Input Under/overshoot voltage must be –2 V > Vi < VDDn+2 V not to exceed 3.6 V maximum, with a pulse width not to exceed 20% tKC.
VDDQ Range Logic Levels
Parameter
Symbol
Min.
Typ.
Max.
Unit
Notes
VDD Input High Voltage
VIH
0.6*VDD
—
VDD + 0.3
V1
VDD Input Low Voltage
VIL
–0.3
—
0.3*VDD
V1
VDDQ I/O Input High Voltage
VIHQ
0.6*VDD
—
VDDQ + 0.3
V1,3
VDDQ I/O Input Low Voltage
VILQ
–0.3
—
0.3*VDD
V1,3
Notes:
1.
The part numbers of Industrial Temperature Range versions end the character “I”. Unless otherwise noted, all performance specifications quoted are
evaluated for worst case in the temperature range marked on the device.
2.
Input Under/overshoot voltage must be –2 V > Vi < VDDn+2 V not to exceed 3.6 V maximum, with a pulse width not to exceed 20% tKC.
3.
VIHQ (max) is voltage on VDDQ pins plus 0.3 V.
Recommended Operating Temperatures
Parameter
Symbol
Min.
Typ.
Max.
Unit
Notes
Ambient Temperature (Commercial Range Versions)
TA
025
70
°C2
Ambient Temperature (Industrial Range Versions)
TA
–40
25
85
°C2
Note:
1.
The part numbers of Industrial Temperature Range versions end the character “I”. Unless otherwise noted, all performance specifications quoted are
evaluated for worst case in the temperature range marked on the device.
2.
Input Under/overshoot voltage must be –2 V > Vi < VDDn+2 V not to exceed 3.6 V maximum, with a pulse width not to exceed 20% tKC.
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