參數(shù)資料
型號(hào): GS816272C-150T
廠商: GSI TECHNOLOGY
元件分類: SRAM
英文描述: 256K X 72 CACHE SRAM, 7.5 ns, PBGA209
封裝: 14 X 22 MM, 1 MM PITCH, BGA-209
文件頁數(shù): 26/31頁
文件大?。?/td> 1583K
代理商: GS816272C-150T
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Mode Pin Functions
Mode Name
Pin Name
State
Function
Burst Order Control
LBO
L
Linear Burst
H
Interleaved Burst
Output Register Control
FT
L
Flow Through
H or NC
Pipeline
Power Down Control
ZZ
L or NC
Active
H
Standby, IDD = ISB
Single/Dual Cycle Deselect Control
SCD
L
Dual Cycle Deselect
H or NC
Single Cycle Deselect
FLXDrive Output Impedance Control
ZQ
L
High Drive (Low Impedance)
H or NC
Low Drive (High Impedance)
GS816272C
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 2.18 11/2005
4/31
1999, GSI Technology
Note:
There are pull-up devices on the ZQ, SCD, and FT pinsand a pull-down device on the ZZ pin, so those input pins can be unconnected and the
chip will operate in the default states as specified in the above tables.
Note:
The burst counter wraps to initial state on the 5th clock.
Note:
The burst counter wraps to initial state on the 5th clock.
Linear Burst Sequence
A[1:0] A[1:0] A[1:0] A[1:0]
1st address
00
01
10
11
2nd address
01
10
11
00
3rd address
10
11
00
01
4th address
11
00
01
10
Interleaved Burst Sequence
A[1:0] A[1:0] A[1:0] A[1:0]
1st address
00
01
10
11
2nd address
01
00
11
10
3rd address
10
11
00
01
4th address
11
10
01
00
Burst Counter Sequences
BPR 1999.05.18
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GS816272CC-150 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 2.5V/3.3V 18MBIT 256KX72 7.5NS/3.8NS 209FBGA - Trays
GS816272CC-150I 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 2.5V/3.3V 18MBIT 256KX72 7.5NS/3.8NS 209FBGA - Trays
GS816272CC-150IV 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 1.8V/2.5V 18MBIT 256KX72 7.5NS/3.8NS 209FBGA - Trays
GS816272CC-150V 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 1.8V/2.5V 18MBIT 256KX72 7.5NS/3.8NS 209FBGA - Trays