參數(shù)資料
型號： GS8324Z36B-150IT
廠商： GSI TECHNOLOGY
元件分類： SRAM
英文描述： 1M X 36 ZBT SRAM, 10 ns, PBGA119
封裝： 14 X 22 MM, 1.27 MM PITCH, BGA-119
文件頁數(shù)： 17/46頁
文件大?。?/td> 1157K
代理商： GS8324Z36B-150IT
Rev: 1.00 10/2001
24/46
2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Preliminary
GS8324Z18(B/C)/GS8324Z36(B/C)/GS8324Z72(C)
Power Supply Voltage Ranges
Parameter
Symbol
Min.
Typ.
Max.
Unit
Notes
3.3 V Supply Voltage
VDD3
3.0
3.3
3.6
V
2.5 V Supply Voltage
VDD2
2.3
2.5
2.7
V
3.3 V VDDQ I/O Supply Voltage
VDDQ3
3.0
3.3
3.6
V
2.5 V VDDQ I/O Supply Voltage
VDDQ2
2.4
2.5
2.7
V
Notes:
1.
The part numbers of Industrial Temperature Range versions end the character “I”. Unless otherwise noted, all performance specifications quoted are
evaluated for worst case in the temperature range marked on the device.
2.
Input Under/overshoot voltage must be –2 V > Vi < VDDn+2 V not to exceed 4.6 V maximum, with a pulse width not to exceed 20% tKC.
VDDQ3 Range Logic Levels
Parameter
Symbol
Min.
Typ.
Max.
Unit
Notes
VDD Input High Voltage
VIH
1.7
—
VDD + 0.3
V
1
VDD Input Low Voltage
VIL
–
0.3
—
0.8
V
1
VDDQ I/O Input High Voltage
VIHQ
1.7
—
VDDQ + 0.3
V
1,3
VDDQ I/O Input Low Voltage
VILQ
–
0.3
—
0.8
V
1,3
Notes:
1.
The part numbers of Industrial Temperature Range versions end the character “I”. Unless otherwise noted, all performance specifications quoted are
evaluated for worst case in the temperature range marked on the device.
2.
Input Under/overshoot voltage must be –2 V > Vi < VDDn+2 V not to exceed 4.6 V maximum, with a pulse width not to exceed 20% tKC.
3.
VIHQ (max) is voltage on VDDQ pins plus 0.3 V.
VDDQ2 Range Logic Levels
Parameter
Symbol
Min.
Typ.
Max.
Unit
Notes
VDD Input High Voltage
VIH
0.6*VDD
—
VDD + 0.3
V
1
VDD Input Low Voltage
VIL
–
0.3
—
0.3*VDD
V
1
VDDQ I/O Input High Voltage
VIHQ
0.6*VDD
—
VDDQ + 0.3
V
1,3
VDDQ I/O Input Low Voltage
VILQ
–
0.3
—
0.3*VDD
V
1,3
Notes:
1.
The part numbers of Industrial Temperature Range versions end the character “I”. Unless otherwise noted, all performance specifications quoted are
evaluated for worst case in the temperature range marked on the device.
2.
Input Under/overshoot voltage must be –2 V > Vi < VDDn+2 V not to exceed 4.6 V maximum, with a pulse width not to exceed 20% tKC.
3.
VIHQ (max) is voltage on VDDQ pins plus 0.3 V.
相關(guān)PDF資料
PDF描述
GS8324Z36GB-250IT 1M X 36 ZBT SRAM, 6 ns, PBGA119
GS8324Z72GC-133IT 512K X 72 ZBT SRAM, 10 ns, PBGA209
GS840E18GB-100T 256K X 18 CACHE SRAM, 12 ns, PBGA119
GS840E18GB-180 256K X 18 CACHE SRAM, 8 ns, PBGA119
GS8641E18F-200IT 4M X 18 CACHE SRAM, 7.5 ns, PBGA165
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GS8324Z36B-200I 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 2.5V/3.3V 36MBIT 1MX36 7.5NS/3NS 119FBGA - Trays
GS8324Z72C200 制造商:G.S.I. 功能描述:
GS8342D06BD-350 制造商:GSI Technology 功能描述:165 FBGA - Bulk
GS8342D06BD-500 制造商:GSI Technology 功能描述:165 FBGA - Bulk
GS8342D06BD-550 制造商:GSI Technology 功能描述:165 FBGA - Bulk
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*