參數(shù)資料
型號: GS840H32A
廠商: GSI TECHNOLOGY
英文描述: 4Mb(128K x 32Bit) Synchronous Burst SRAM(4M位(128K x 32位)同步靜態(tài)RAM(帶2位脈沖地址計數(shù)器))
中文描述: 4Mb的(128K的x 32位)同步突發(fā)靜態(tài)存儲器(4分位(128K的× 32位)同步靜態(tài)隨機存儲器(帶2位脈沖地址計數(shù)器))
文件頁數(shù): 19/31頁
文件大?。?/td> 940K
代理商: GS840H32A
Rev: 1.07 12/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com
19/31
1999, Giga Semiconductor, Inc.
Preliminary
GS840H18/32/36AT/B-200/180/166/150/100
AC Electrical Characteristics
Notes:
1.
2.
These parameters are sampled and are not 100% tested
ZZ is an asynchronous signal. However, In order to be recognized on any given clock cycle, ZZ must meet the specified setup and hold
times as specified above.
Parameter
Symbol
-200
-180
-166
-150
-100
Unit
Min
5.0
1.5
Max
3.0
Min
5.5
1.5
Max
3.2
Min
6.0
1.5
Max
3.5
Min
6.7
1.5
Max
3.8
Min
10
1.5
Max
5
Pipeline
Clock Cycle Time
Clock to Output Valid
Clock to Output Invalid
tKC
tKQ
tKQX
ns
ns
ns
Clock to Output in Low-Z
tLZ
1
tKC
tKQ
tKQX
1.5
1.5
1.5
1.5
1.5
ns
Flow-
Thru
Clock Cycle Time
Clock to Output Valid
Clock to Output Invalid
8.8
3.0
7.5
9.1
3.0
8.0
10.0
3.0
8.5
10.0
3.0
10.0
15.0
3.0
12.0
ns
ns
ns
Clock to Output in Low-Z
tLZ
1
tKH
tKL
3.0
3.0
3.0
3.0
3.0
ns
Clock HIGH Time
Clock LOW Time
1.3
1.5
1.3
1.5
1.3
1.5
1.3
1.5
1.3
1.5
ns
ns
Clock to Output in High-Z
tHZ
1
tOE
1.5
3.0
1.5
3.2
1.5
3.5
1.5
3.8
1.5
5
ns
G to Output Valid
3.0
3.2
3.5
3.8
5
ns
G to output in Low-Z
tOLZ
1
0
0
0
0
0
ns
G to output in High-Z
tOHZ
1
tS
tH
3.0
3.2
3.5
3.8
5
ns
Setup time
Hold time
1.5
0.5
1.5
0.5
1.5
0.5
1.5
0.5
1.5
0.5
ns
ns
ZZ setup time
tZZS
2
5
5
5
5
5
ns
ZZ hold time
tZZH
2
tZZR
1
1
1
1
1
ns
ZZ recovery
20
20
20
20
20
ns
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