參數(shù)資料
型號(hào): GS840H36
廠商: GSI TECHNOLOGY
英文描述: 4Mb(128K x 36Bit) Synchronous Burst SRAM(4M位(128K x 36位)同步靜態(tài)RAM(帶2位脈沖地址計(jì)數(shù)器))
中文描述: 4Mb的(128K的x 36Bit)同步突發(fā)靜態(tài)存儲(chǔ)器(4分位(128K的× 36位)同步靜態(tài)隨機(jī)存儲(chǔ)器(帶2位脈沖地址計(jì)數(shù)器))
文件頁數(shù): 25/31頁
文件大?。?/td> 626K
代理商: GS840H36
Rev: 2.04 6/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com
25/31
1999, Giga Semiconductor, Inc.
GS840H18/32/36T/B-180/166/150/100
Sleep Mode Timing Diagram
Application Tips
Single and Dual Cycle Deselect
SCD devices force the use of “dummy read cycles” (read cycles that are launched normally but that are ended with the output drivers inactive) in
a fully synchronous environment. Dummy read cycles waste performance but their use usually assures there will be no bus contention in
transitions from reads to writes or between banks of RAMs. DCD SRAMs do not waste bandwidth on dummy cycles and are logically simpler to
manage in a multiple bank application (wait states need not be inserted at bank address boundary crossings) but greater care must be exercised
to avoid excessive bus contention.
CK
ADSP
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參數(shù)描述
GS840H36AB-100 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 3.3V 4MBIT 128KX36 12NS/4.5NS 119FBGA - Trays
GS840H36AB-100I 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 3.3V 4MBIT 128KX36 12NS/4.5NS 119FBGA - Trays
GS840H36AB-150 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 3.3V 4MBIT 128KX36 10NS/3.8NS 119FBGA - Trays
GS840H36AB-150I 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 3.3V 4MBIT 128KX36 10NS/3.8NS 119FBGA - Trays
GS840H36AB-166 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 3.3V 4MBIT 128KX36 8.5NS/3.5NS 119FBGA - Trays