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參數(shù)資料
| 型號(hào)： | H8250 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Universal Asynchronous Receiver/Transmitter |
| 中文描述： | 通用異步接收器/發(fā)送器 |
| 文件頁(yè)數(shù)： | 5/7頁(yè) |
| 文件大小： | 49K |
| 代理商： | H8250 |
CAST H8250 Megafunction Datasheet
CAST, Inc.
Page 5
Block Diagram
A2-A0
CS
RD
WR
MR
CLK
DDIS
D7 – D0
INTERFACE
REGISTERS
RXFIFO
TXFIFO
D7 – D0
RXBLOCK
INTERRUPT
CONTROL
BAUD RATE
GENERATOR
TXBLOCK
SIN
RCLK
INTR
BAUDOUT
SOUT
= FIFO Mode
CTSn
DSRn
DCDn
RIn
RTSn
DTRn
OUT1n
OUT2n
RXRDY
TXRDY
Functional Description
As shown above and explained below, the H8250 includes six major blocks: Interface, Registers, RXBlock,
Interrupt Control, Baud Rate Generator, and TXBlock.
I nterface
The Interface block is responsible for handling the communications with the processor (or parallel) side of the
system. All writing and reading of internal registers is accomplished through this block.
Registers
The Registers block holds all of the device’s internal registers. See the Register Description table for details on
existing registers and their addresses. Some information comes from the other blocks, but this is all gathered
together in the Registers block and made available to all blocks.
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