3550.6 February 8, 2006 Application Information Optimum Feedback Resistor The plots of inverting and non-inverting frequency response, see Figur" />
參數(shù)資料
型號: HA5024IBZ
廠商: Intersil
文件頁數(shù): 14/16頁
文件大?。?/td> 0K
描述: IC OPAMP QUAD 125MHZ 20-SOIC
標(biāo)準(zhǔn)包裝: 38
應(yīng)用: 電流反饋
電路數(shù): 4
-3db帶寬: 125MHz
轉(zhuǎn)換速率: 350 V/µs
電流 - 電源: 7.5mA
電流 - 輸出 / 通道: 20mA
電壓 - 電源,單路/雙路(±): ±4.5 V ~ 18 V
安裝類型: 表面貼裝
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 20-SOIC W
包裝: 管件
產(chǎn)品目錄頁面: 1234 (CN2011-ZH PDF)
7
3550.6
February 8, 2006
Application Information
Optimum Feedback Resistor
The plots of inverting and non-inverting frequency response,
see Figure 11 and Figure 12 in the Typical Performance
Curves section, illustrate the performance of the HA5024 in
various closed loop gain configurations. Although the
bandwidth dependency on closed loop gain isn’t as severe
as that of a voltage feedback amplifier, there can be an
appreciable decrease in bandwidth at higher gains. This
decrease may be minimized by taking advantage of the
current feedback amplifier’s unique relationship between
bandwidth and RF. All current feedback amplifiers require a
feedback resistor, even for unity gain applications, and RF,
in conjunction with the internal compensation capacitor, sets
the dominant pole of the frequency response. Thus, the
amplifier’s bandwidth is inversely proportional to RF. The
HA5024 design is optimized for a 1000
R
F at a gain of +1.
Decreasing RF in a unity gain application decreases stability,
resulting in excessive peaking and overshoot. At higher
gains the amplifier is more stable, so RF can be decreased
in a trade-off of stability for bandwidth.
The table below lists recommended RF values for various
gains, and the expected bandwidth.
PC Board Layout
The frequency response of this amplifier depends greatly on
the amount of care taken in designing the PC board. The
use of low inductance components such as chip resistors
and chip capacitors is strongly recommended. If leaded
components are used the leads must be kept short
especially for the power supply decoupling components and
those components connected to the inverting input.
Attention must be given to decoupling the power supplies. A
large value (10
F) tantalum or electrolytic capacitor in
parallel with a small value (0.1
F) chip capacitor works well
in most cases.
A ground plane is strongly recommended to control noise.
Care must also be taken to minimize the capacitance to
ground seen by the amplifier’s inverting input (-IN). The
larger this capacitance, the worse the gain peaking, resulting
in pulse overshoot and possible instability. It is
recommended that the ground plane be removed under
traces connected to -IN, and that connections to -IN be kept
as short as possible to minimize the capacitance from this
node to ground.
Driving Capacitive Loads
Capacitive loads will degrade the amplifier’s phase margin
resulting in frequency response peaking and possible
oscillations. In most cases the oscillation can be avoided by
placing an isolation resistor (R) in series with the output as
shown in Figure 6.
The selection criteria for the isolation resister is highly
dependent on the load, but 27
has been determined to be
a good starting value.
Power Dissipation Considerations
Due to the high supply current inherent in quad amplifiers, care
must be taken to insure that the maximum junction temperature
(TJ, see Absolute Maximum Ratings) is not exceeded. Figure 7
shows the maximum ambient temperature versus supply
voltage for the available package styles (Plastic DIP, SOIC). At
±5V
DC quiescent operation both package styles may be
operated over the full industrial range of -40°C to 85°C. It is
recommended that thermal calculations, which take into
account output power, be performed by the designer.
Enable/Disable Function
When enabled the amplifier functions as a normal current
feedback amplifier with all of the data in the electrical
specifications table being valid and applicable. When
disabled the amplifier output assumes a true high
impedance state and the supply current is reduced
significantly.
GAIN (ACL)RF ()
BANDWIDTH (MHz)
-1
750
100
+1
1000
125
+2
681
95
+5
1000
52
+10
383
65
-10
750
22
VIN
VOUT
CL
RT
+
-
RI
RF
R
FIGURE 6. PLACEMENT OF THE OUTPUT ISOLATION
RESISTOR, R
100
130
120
110
100
90
70
5
7
9
111315
MAX
.AMBIE
N
T
TEMPE
R
A
T
URE
SUPPLY VOLTAGE (
±V)
PDIP
80
60
50
SOIC
FIGURE 7. MAXIMUM OPERATING AMBIENT TEMPERA-
TURE vs SUPPLY VOLTAGE
HA5024
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