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參數(shù)資料
| 型號： | HC4052 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | T-PNP SI-AF PO |
| 中文描述： | 雙4通道模擬多路復用器/解復用器 |
| 文件頁數(shù)： | 16/16頁 |
| 文件大?。?/td> | 341K |
| 代理商： | HC4052 |
MC74VHC4051, MC74VHC4052, MC74VHC4053
http://onsemi.com
9
Figure 2. Maximum Off Channel Leakage Current,
Any One Channel, Test Set–Up
Figure 3. Maximum Off Channel Leakage Current,
Common Channel, Test Set–Up
Figure 4. Maximum On Channel Leakage Current,
Channel to Channel, Test Set–Up
Figure 5. Maximum On Channel Bandwidth,
Test Set–Up
Figure 6. Off Channel Feedthrough Isolation,
Test Set–Up
Figure 7. Feedthrough Noise, Channel Select to
Common Out, Test Set–Up
OFF
6
7
8
16
COMMON O/I
VCC
VEE
VIH
NC
A
VCC
VEE
VCC
OFF
6
7
8
16
COMMON O/I
VCC
VEE
VIH
ANALOG I/O
VCC
VEE
VCC
ON
OFF
6
7
8
16
COMMON O/I
VCC
VEE
VIL
VCC
VEE
VCC
N/C
A
ANALOG I/O
ON
6
7
8
16
VCC
VEE
0.1
F
CL*
fin
RL
dB
METER
*Includes all probe and jig capacitance
OFF
6
7
8
16
VCC
VEE
0.1
F
CL*
fin
RL
dB
METER
*Includes all probe and jig capacitance
VOS
RL
VIS
VIL or VIH
CHANNEL SELECT
ON/OFF
6
7
8
16
VCC
VEE
CL*
RL
*Includes all probe and jig capacitance
CHANNEL SELECT
TEST
POINT
COMMON O/I
11
VCC
OFF/ON
ANALOG I/O
RL
VCC
GND
Vin ≤ 1 MHz
tr = tf = 6 ns
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