參數(shù)資料
型號: HD404669
廠商: Hitachi,Ltd.
英文描述: Low-Voltage AS Microcomputers with On-Chip DTMF Generation Circuit(帶雙音多頻電路的低電壓微計算機)
中文描述: 低電壓如同在微機芯片的DTMF產(chǎn)生電路(帶雙音多頻電路的低電壓微計算機)
文件頁數(shù): 35/142頁
文件大?。?/td> 894K
代理商: HD404669
HD404669 Series
35
Stop Mode:
In stop mode, all MCU operations stop and RAM data is retained. Therefore, the power
dissipation in this mode is the least of all modes. The OSC
1
and OSC
2
oscillator stops. For the X1 and X2
oscillator to operate or stop can be selected by setting bit 3 of the system clock select register 1 (SSR1:
$029; operating: SSR13 = 0, stop: SSR3 = 1) (figure 24). The MCU enters stop mode if the STOP
instruction is executed in active mode when bit 3 of timer mode register A (TMA: $008) is set to 0 (TMA3
= 0) (figure 40).
Stop mode is cleared by a RESET or
STOPC
* input. The RESET or
STOPC
input must be held for at least
the oscillation stabilization time (t
RC
) as shown in figure 16. (refer to the "AC Characteristics" section.) In
either of these cases, the MCU will start program execution from the program start address (location 0).
However, the value of the RAM enable flag (RAME: $021,3) will be different in these cases. In particular,
RAME will be set to 0 for a RESET input and will be set to 1 for a
STOPC
input.
Also note that while a RESET input is effective in all MCU modes,
STOPC
is only effective in stop mode,
and is ignored in all other modes.
If a program needs to determine if stop mode was cleared by a
STOPC
input (for example, if the program
intends to use the contents of RAM that were stored before stop mode was entered after returning to active
mode) the program should test the RAM enable flag with a TEST instruction at the start of the program.
Note: *
If stop mode is to be cleared by a
S T OP C
input, applications should set bit 2 of port mode
register C (PMRC) to 1 (PMRC2 = 1) before switching to stop mode.
Stop mode
Oscillator
Internal
clock
STOP instruction execution
(at least equal to oscillation stabilization time t
RC
)
t
res
RESET
STOPC
Figure 16 Timing of Stop Mode Cancellation
Watch Mode:
In watch mode, the clock function (timer A) using the X1 and X2 oscillator, but other
function operations stop. Therefore, the power dissipation in this mode is the second least to stop mode,
and this mode is convenient when only clock display is used. In this mode, the OSC
1
and OSC
2
oscillator
stops, but the X1 and X2 oscillator operates. The MCU is switched to watch mode by executing a STOP
instruction while TMA3 = 1 in active mode, or by executing a STOP/SBY instruction while LSON is set to
1 or DTON is cleared to 0 in subactive mode.
Watch mode is terminated by a RESET input or a timer-A/
INT
0
interrupt request. For details of RESET
input, refer to the Stop Mode section. When terminated by a timer-A/
INT
0
interrupt request, the MCU
enters active mode if LSON = 0, or subactive mode if LSON = 1. After an interrupt request is generated,
the time required to enter active mode is t
RC
for a timer A interrupt, and T
X
(where T + t
RC
< T
X
< 2T +
t
RC
) for an
INT
0
interrupt, as shown in figures 17 and 18.
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