參數(shù)資料
型號(hào): HD407A4669
廠商: Hitachi,Ltd.
英文描述: Low-Voltage AS Microcomputers with On-Chip DTMF Generation Circuit(帶雙音多頻電路的低電壓微計(jì)算機(jī))
中文描述: 低電壓如同在微機(jī)芯片的DTMF產(chǎn)生電路(帶雙音多頻電路的低電壓微計(jì)算機(jī))
文件頁數(shù): 136/142頁
文件大小: 894K
代理商: HD407A4669
HD404669 Series
136
Serial Interface Timing Characteristics (HD404668, HD4046612, HD404669, HD40A4668,
HD40A46612, HD40A4669: V
CC
= 1.8 to 5.5 V, GND = 0 V, T
a
= –20
°
C to +75
°
C; HCD404669: V
=
1.8 to 5.5 V, GND = 0 V, T
a
= +75
°
C; HD407A4669: V
CC
= 2.2 to 5.5 V, GND = 0 V, T
a
= –20
°
C to
+75
°
C, unless otherwise specified)
During Transmit Clock Output
Item
Symbol
Pin
Min
Typ
Max
Unit
Test Condition
Notes
Transmit clock cycle time
t
Scyc
SCK
1
1.0
t
cyc
Load shown in
figure 96
1
Transmit clock high width
t
SCKH
SCK
1
0.4
t
Scyc
Load shown in
figure 96
1
Transmit clock low width
t
SCKL
SCK
1
0.4
t
Scyc
Load shown in
figure 96
1
Transmit clock rise time
t
SCKr
SCK
1
100
ns
Load shown in
figure 96
1
Transmit clock fall time
t
SCKf
SCK
1
100
ns
Load shown in
figure 96
1
Serial output data
delay time
t
DSO
SO
1
300
ns
Load shown in
figure 96
1
Serial input data
setup time
t
SSI
SI
1
200
ns
1
Serial input data
hold time
t
HSI
SI
1
200
ns
1
Note: 1. Refer to figure 95.
During Transmit Clock Input
Item
Symbol
Pin
Min
Typ
Max
Unit
Test Condition
Notes
Transmit clock cycle time
t
Scyc
SCK
1
1.0
t
cyc
1
Transmit clock high width
t
SCKH
SCK
1
0.4
tScyc
t
Scyc
1
Transmit clock low width
t
SCKL
SCK
1
0.4
1
Transmit clock rise time
t
SCKr
SCK
1
100
ns
1
Transmit clock fall time
t
SCKf
SCK
1
100
ns
1
Serial output data
delay time
t
DSO
SO
1
300
ns
Load shown in
figure 96
1
Serial input data
setup time
t
SSI
SI
1
200
ns
1
Serial input data
hold time
t
HSI
SI
1
200
ns
1
Note: 1. Refer to figure 95.
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