HD404669 Series
37
Subactive Mode:
The OSC
1
and OSC
2
oscillator stops and the MCU operates with a clock generated by
the X1 and X2 oscillator. In this mode, functions other than the DTMF generation circuit operate, but since
the operating clocks are slow, power consumption is the lowest after watch mode.
The CPU instruction execution speed can be selected as 244
μ
s or 122
μ
s by setting bit 2 (SSR12) of the
system clock select register (SSR1: $029). Note that the SSR12 value must be changed in active mode. If
the value is changed in subactive mode, the MCU may malfunction.
When the STOP or SBY instruction is executed in subactive mode, the MCU enters either watch or active
mode, depending on the statuses of the low speed on flag (LSON: $020, bit 0) and the direct transfer on
flag (DTON: $020, bit 3).
Subactive mode is an optional function that the user must specify on the function option list.
Interrupt Frame:
In watch and subactive modes,
φ
CLK
is applied to timer A and the
INT
0
I
circuit.
Prescaler W and timer A operate as the time-base and generate the timing clock for the interrupt frame.
Three interrupt frame periods (T) can be selected by setting the miscellaneous register (MIS: $00C) (figure
18).
In watch and subactive modes, the timer-A/
INT
0
interrupt is generated synchronously with the interrupt
frame. The interrupt request is generated synchronously with the interrupt strobe timing except during
transition to active mode. An overflow and interrupt request in timer A is generated synchronously with the
interrupt strobe timing.
Bit
Initial value
Read/Write
Bit name
3
0
W
MIS3
2
0
W
MIS2
0
0
W
MIS0
1
0
W
MIS1
Miscellaneous register (MIS: $00C)
MIS1
0
MIS0
T
*
0
0.24414 ms
t
RC
0.12207 ms
0.24414 ms
7.8125 ms
31.25 ms
Oscillation circuit conditions
External clock input
Ceramic oscillator
Crystal oscillator
0
1
1
1
0
1
15.625 ms
62.5 ms
Not used
Not used
—
Notes: 1.
2.
Values of T and t
RC
when a 32.768-kHz crystal oscillator is used to pins x1 and x2.
The value is applied only when direct transfer operation is used.
Buffer control.
See figure 37 in the
pull-up and pull-down
MOS transistor
control section
MIS3
MIS2
1
*
1
*
2
Figure 18 Miscellaneous Register (MIS)