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參數(shù)資料
| 型號(hào)： | HD66321 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | Multiscan 258-Channel Gate Driver(多掃描258通道門驅(qū)動(dòng)器) |
| 中文描述： | 多掃描258通道柵極驅(qū)動(dòng)器（多掃描258通道門驅(qū)動(dòng)器） |
| 文件頁數(shù)： | 4/34頁 |
| 文件大?。?/td> | 106K |
| 代理商： | HD66321 |
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HD66321
4
Pin Functions
Signal Name
Quantity
Input/Output
Function
VLCDL, R
2
Power supply
+
–
+
–
+
–
GND
V
CC
V
EE
V
LCD
V
CC
GND
1
Power supply
V
LCD
–V
EE
: high-voltage circuit power supply
V
CC
–GND: Logic power supply
The same potential is applied to V
LCDL
and V
LCDR
.
The same potential is applied to V
EEL
and V
EER
.
Apply the gate on-level.
1
Power supply
VEEL, R
2
Power supply
VHL, R
2
Power supply
VML, R
2
Power supply
Apply intermediate level among gate off-levels. Not used
with the dot inversion system; in this case, the same level is
applied as to the VLL and VLR pins.
VLL, R
2
Power supply
Apply the lowest gate off-level.
CL3
1
Input
Scanning signals DL0-1 and DR0-1 are latched in
synchronization with the rise of this clock. The output
voltage also changes from off to on and vice versa at the
same rise timing.
CNT0
CNT1
2
Input
Signals that select the number of lines on which scanning
signals are scanned simultaneously. These signals function
in dot inversion drive and counter electrode inversion drive.
With gate coupling drive, line-by-line scanning is performed.
With interlaced drive, line-by-line interlaced scanning is
performed.
With gate coupling drive and interlaced drive, CNT0 and
CNT1 are used at the low level.
Simultaneously selected lines
1
2
16
32
CNT0
0
1
0
1
CNT1
0
0
1
1
When FS1 = 1 and FS0 = 1
Simultaneously selected lines
1
4
×
4
16
×
4
32
×
4
CNT0
0
1
0
1
CNT1
0
0
1
1
When FS1 = 1 and FS0 = 0
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