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參數(shù)資料
| 型號： | HD66321 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | Multiscan 258-Channel Gate Driver(多掃描258通道門驅(qū)動器) |
| 中文描述： | 多掃描258通道柵極驅(qū)動器（多掃描258通道門驅(qū)動器） |
| 文件頁數(shù)： | 5/34頁 |
| 文件大小： | 106K |
| 代理商： | HD66321 |
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HD66321
5
Signal Name
Quantity
Input/Output
Function
DL0
DL1
DR0
DR1
4
Input/output
Pins used for scanning signals input or output to the next-
stage IC. Switching between input and output is performed
by the scanning signal shift direction switching signal, SHL,
as shown below.
When SHL = 0, input the scanning signal to DL0 of the first-
stage IC. Fix DL1 low, or, if necessary, input to DL1 the
same signal as the one input to DL0. Connect output DR0
to DL0, and output DR1 to DL1, of the next-stage IC.
When SHL = 1, input the scanning signal to DR0 of the first-
stage IC. Fix DR1 low, or, if necessary, input to DR1 the
same signal as one input to DR0. Connect output DL0 to
DR0, and the output DL1 to DR1, of the next-stage IC.
For scanning signal transfer to the next-stage IC, see the
sections on the various functions.
SHL
0
1
DL0
Input
Output
DL1
Input
Output
DR0
Output
Input
DR1
Output
Input
SHL
1
Input
Controls output scanning direction.
When SHL = 0, shift is performed in X1 to X257 direction.
When SHL = 1, shift is performed in X256 to X0 direction.
M
1
Input
The high or low level of this signal selects VM or VL from the
gate off-levels. If gate off-level alternation is not necessary,
fix this signal at low.
DISPOFF
1
Input
When this signal is driven low, all X pins output the VM level
regardless of the shift register contents or the M signal.
Shift register contents and operation are not affected.
FS0
FS1
2
Input
Gate line drive waveforms are generated for various drive
systems according to the settings of these signals.
For details, see the waveform examples (p. 8).
Drive System
Gate-coupling drive
Interlaced drive
Dot inversion/counter-electrode inversion drive
Dot inversion/counter-electrode inversion drive
FS0
0
1
0
1
FS1
0
0
1
1
FRM/LIN
1
Input
Valid when gate coupling drive is used; selects frame
alternation when high, line alternation when low.
With other drive waveforms, this signal is used at the low
level. In this case, gate off-level VM or VL is output
according to the M signal.
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