參數(shù)資料
型號： HD66350T
廠商： Hitachi,Ltd.
英文描述： 256-level Grayscale TFT for XGA/SXGA/UXGA Systems(高品質(zhì)TFT LCD的256級灰度驅(qū)動器)
中文描述： 256級灰度的TFT為吋XGA / SXGA /的UXGA系統(tǒng)（高品質(zhì)TFT液晶顯示器的256級灰度驅(qū)動器）
文件頁數(shù)： 7/30頁
文件大小： 147K
代理商： HD66350T
HD66350T
7
Table 1 Pin Functions (cont)
Signal Name
Quantity
Input/Output
Function
EIO1, EIO2
2
Input/output
Chip-enable signals. Input/output switching is controlled by
the SHL signal. When these signals are used as inputs,
display data latching is performed when the input goes high.
When these signals are used as outputs, a low-to-high
transition is made at the rising edge of the 63rd (66th) clock
of the CL2 signal, and the next-stage driver is activated.
(Values in parentheses are for the 402-output LSIs.)
EIO2
Output
Input
EIO1
Input
Output
SHL
V
CC
GND
M
1
Input
Current-alternating signal, controlling the liquid-crystal
alternating-current drive. The M signal is input after
provision of a setup time with respect to the rise of the CL1
signal. Positive-polarity (V0–V4) and negative-polarity (V5–
V9) output voltages are generated as shown below
according to the polarity of the latched M signal.
Even output pins (Y2,Y4,
.
..,Y384)
Negative-polarity liquid-crystal
application voltage is output
Odd output pins (Y1,Y3,
.
..,Y383)
Positive-polarity liquid-crystal
application voltage is output
M
Negative-polarity liquid-crystal
application voltage is output
Positive-polarity liquid-crystal
application voltage is output
0
1
OS
1
Input
Pin for switching the number of outputs. When OS is low,
this LSI operates as a 384-output product. When OS is high,
this LSI operates as a 402-output product.
Since this pin performs 50-k
pull-down processing within
the chip, it must be opened or low when used as the 384-
output product. When this pin is used as the 402-output
product, it must be high.
FSL
1
Input
Pin for switching the operating speed.
When it is used in the range of 40 to 65 MHz, input high
level. When it is used in the range of 30 to 40 MHz, input
low level.
Since this pin performs 50-k
pull-down processing within
the chip, it can be opened when it is used in the range of 30
to 40 MHz.
STPLS
1
Input
Input the same signal as the start pulse, which is input in the
first-stage IC, to the STPLS pin in all drivers. This pin is
required for high-speed operation.
ODD/EVN
1
Input
When this pin is used for 402-output operation (OS = high),
use the first, third, or fifth pin as low level in the order of
fetched data. Use the second, fourth, or sixth pin as high
level. This pin is required for 402-output operation.
When this pin is used for 384-output operation (OS = low),
set this pin to low in all drivers. Since this pin performs 50-
k
pull-down processing within the chip, it can be opened.
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HD66421 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:(RAM-Provided 160 Channel 4-Level Grey Scale Driver for Dot Matrix Graphics LCD)
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