HD66760
38
Table 28 Instruction List
Upper Code
Lower Code
Reg.
No.
Register
Name
R/W
RS
DB
15
DB
14
DB
13
DB
12
DB
11
DB
10
DB
9
DB
8
DB
7
DB
6
DB
5
DB
4
DB
3
DB
2
DB
1
DB
0
Description
Execu-
tion
Cycle
IR
Index
0
0
*
*
*
*
*
*
*
*
*
ID6
ID5
ID4
ID3
ID2
ID1
ID0
Sets the index register value.
0
SR
Status
read
1
0
0
L6
L5
L4
L3
L2
L1
L0
0
C6
C5
C4
C3
C2
C1
C0
Reads the driving raster-row
position (L7–0) and contrast setting
(C6–0).
0
R00h Start
oscillation
0
1
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
1
Starts the oscillation mode.
10 ms
Device
code read
1
1
1
0
0
0
0
1
1
1
0
1
1
0
0
0
0
0
Reads 8760h
0
R01h Driver
output
control
0
1
0
0
0
0
0
0
CMS
SGS
0
0
0
0
NL3
NL2
NL1
NL0
Sets the common driver shift
direction (CMS), segment driver
shift direction (SGS), and driving
duty ratio (NL3–0).
0
R02h LCD-
driving-
waveform
control
0
1
0
0
0
0
0
0
0
RST
0
B/C
EOR NW4
NW3 NW2
NW1
NW0 Software reset (RST), LCD drive AC
waveform (B/C), EOR output (EOR),
and the number of n-raster-rows
(NW4–0) at C-pattern AC drive.
10 tcyc
R03h Power
control
0
1
0
0
0
BS2
BS1
BS0
BT1
BT0
PS1
PS0
DC1
DC0
AP1
AP0
SLP
STB Sets the sleep mode (SLP), standby
mode (STB), LCD power on (AP1–
0), boosting cycle (DC1–0), boosting
output multiplying factor (BT1–0),
and LCD drive bias value (BS2–0).
0
R04h Contrast
control
0
1
0
0
0
0
0
VR2
VR1
VR0
0
CT6
CT5
CT4
CT3
CT2
CT1
CT0
Sets the contrast adjustment
(CT6–0) and regulator adjustment
(VR2–0).
0
R05h Entry
mode
0
1
0
0
0
0
0
0
0
SWP
0
0
0
I/D
AM
LG2
LG1
LG0
Specifies the logical operation
(LG2–0), AC counter mode (AM),
increment/decrement mode (I/D),
and swap (SWP).
0
R06h Compare
register
0
1
0
0
0
0
0
0
0
0
CP7
CP6
CP5
CP4
CP3
CP2
CP1
CP0 Sets the compare register (CP7–0).
0
R07h Display
control
0
1
0
0
0
0
0
VLE
2
VLE
1
SPT
0
0
E
B/W
GS
REV
D1
D0
Specifies display on (D1–0),
reversed display (REV), 4-/16-
grayscale mode (GS), pixel mode
enable (E), pixel on/off (B/W),
screen division driiving (SPT), and
vertical scroll (VLE2–1).
0
R08h Cursor
control
0
1
0
0
0
0
0
CR
CG
CB
0
0
0
C
0
0
CM1
CM0
Specifies cursor display on (C),
cursor display mode (CM1–0), and
cursor color (CR, CG, or CB).
R09h Grayscale
and blink
synchroni-
zation
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Synchronizes the grayscale with the
blink cycle.
0
R11h Vertical
scroll
control
0
1
0
VL26 VL25 VL24 VL23 VL22 VL21 VL20
0
VL16 VL15 VL14 VL13 VL12 VL11 VL10 Specifies the 1st-screen display-
start raster-row (VL16–10) and 2nd-
screen display-start raster-row
(VL26–20).
0
R12h Horizontal
cursor
position
0
1
0
HE6
HE5
HE4
HE3
HE2
HE1
HE0
0
HS6
HS5
HS4
HS3
HS2
HS1
HS0 Sets horizontal cursor start (HS6–0)
and end (HE6–0).
0
R13h Vertical
cursor
position
0
1
0
VE6
VE5
VE4
VE3
VE2
VE1
VE0
0
VS6
VS5
VS4
VS3
VS2
VS1
VS0
Sets vertical cursor start (VS6–0)
and end (VE6–0).
0
R14h 1st screen
driving
position
0
1
0
SE
16
SE
15
SE
14
SE
13
SE
12
SE
11
SE
10
0
SS
16
SS
15
SS
14
SS
13
SS
12
SS
11
SS
10
Sets 1st-screen driving start
(SS16–10) and end (SE16–10).
0
R15h 2nd screen
driving
position
0
1
0
SE
26
SE
25
SE
24
SE
23
SE
22
SE
21
SE
20
0
SS
26
SS
25
SS
24
SS
23
SS
22
SS
21
SS
20
Sets 2nd-screen driving start
(SS26–20) and end (SE26–20).
0
R20h RAM write
data mask
0
1
WM
15
WM
14
WM
13
WM
12
WM
11
WM
10
WM
9
WM
8
WM
7
WM
6
WM
5
WM
4
WM
3
WM
2
WM
1
WM
0
Specifies write data mask (WM15–
0) at RAM write.
0