參數(shù)資料
型號(hào): HD66760
廠商: Hitachi,Ltd.
英文描述: 104 X 80-dot Graphics LCD Controller/Driver for 256 Colors
中文描述: 104 × 80點(diǎn)圖形LCD控制器/驅(qū)動(dòng)器的256色
文件頁數(shù): 41/105頁
文件大?。?/td> 653K
代理商: HD66760
HD66760
41
Parallel Data Transfer
16-bit Bus Interface
Setting the IM2-0 (interface mode) to the GND/GND/GND level allows 68-system E-clock-synchronized 16-
bit parallel data transfer. Setting the IM2-0 to the GND/Vcc/GND level allows 80-system 16-bit parallel data
transfer. When the number of buses or the mounting area is limited, use an 8-bit bus interface.
CSn
*
A1
HWR
*
(RD
*
)
D1
CS
*
RS
WR
*
(RD
*
)
DB15–DB0
H8/2245
HD66760
16
Figure 26 Interface to 16-bit Microcomputer
8-bit Bus Interface
Setting the IM2-0 (interface mode) to the GND/GND/Vcc level allows 68-system E-clock-synchronized 8-bit
parallel data transfer using pins DB15-DB8. Setting the IM2-0 to the GND/Vcc/Vcc level allows 80-system
8-bit parallel data transfer. The 16-bit instructions and RAM data are divided into eight upper/lower bits and
the transfer starts from the upper eight bits. Fix unused pins DB7-DB0 to the Vcc or GND level. Note that
the upper bytes must also be written when the index register is written to.
CSn
*
A1
HWR
*
(RD
*
)
D1
CS
*
RS
WR
*
(RD
*
)
DB15–DB8
DB7–0
H8/2245
HD66760
8
8
GND
Figure 27 Interface to 8-bit Microcomputer
Note:
Transfer synchronization function for an 8-bit bus interface
The HD66760 supports the transfer synchronization function which resets the upper/lower counter to
count upper/lower 8-bit data transfer in the 8-bit bus interface. Noise causing transfer mismatch
between the eight upper and lower bits can be corrected by a reset triggered by consecutively writing
a 00H instruction four times. The next transfer starts from the upper eight bits. Executing
synchronization function periodically can recover any runaway in the display system.
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