參數(shù)資料
型號(hào): HM5113805F
廠商: Hitachi,Ltd.
英文描述: 128 M EDO(Extended Data Output) DRAM(128M 擴(kuò)展數(shù)據(jù)輸出模式動(dòng)態(tài)RAM)
中文描述: 128米江戶(擴(kuò)展數(shù)據(jù)輸出)內(nèi)存(128M的擴(kuò)展數(shù)據(jù)輸出模式動(dòng)態(tài)內(nèi)存)
文件頁數(shù): 8/34頁
文件大?。?/td> 466K
代理商: HM5113805F
HM5112805F-6, HM5113805F-6
8
DC Characteristics
(HM5112805F)
HM5112805F
-6
Parameter
Symbol
Min
Max
Unit
Test conditions
Operating current*
1,
*
2
I
CC1
I
CC2
200
mA
t
RC
= min
TTL interface
RAS
,
CAS
= V
IH
Dout = High-Z
Standby current
4
mA
1
mA
CMOS interface
RAS
,
CAS
V
CC
– 0.2 V
Dout = High-Z
Standby current
(L-version)
I
CC2
500
μ
A
CMOS interface
RAS
,
CAS
V
CC
– 0.2 V
Dout = High-Z
RAS
-only refresh current*
2
I
CC3
I
CC5
200
mA
t
RC
= min
RAS
= V
,
CAS
= V
IL
Dout = enable
Standby current*
1
10
mA
CAS
-before-
RAS
refresh current I
CC6
EDO page mode current*
1,
*
3
200
mA
t
RC
= min
RAS
= V
IL
,
CAS
cycle,
t
HPC
= t
HPC
min
CMOS interface
Dout = High-Z
CBR refresh: t
RC
= 15.6
μ
s
t
RAS
0.3
μ
s
CMOS interface
RAS
,
CAS
0.2 V
Dout = High-Z
I
CC7
200
mA
Battery backup current*
4
(Standby with CBR refresh)
(L-version)
I
CC10
2.5
mA
Self refresh mode current
(L-version)
I
CC11
1.6
mA
Input leakage current
I
LI
I
LO
–5
5
μ
A
μ
A
0 V
Vin
V
CC
+ 0.3 V
0 V
Vout
V
CC
Dout = disable
Output leakage current
–5
5
Output high voltage
V
OH
V
OL
2.4
V
CC
0.4
V
High Iout = –2 mA
Output low voltage
Notes: 1. I
depends on output load condition when the device is selected. I
CC
max is specified at the
output open condition.
2. Address can be changed once or less while
RAS
= V
IL
.
3. Measured with one sequential address change per EDO cycle, t
HPC
.
4. V
IH
V
CC
– 0.2 V, 0 V
V
IL
0.2 V.
0
V
Low Iout = 2 mA
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