參數(shù)資料
型號: HM514260CLTT-6
廠商: Hitachi,Ltd.
英文描述: 262,144-word x 16-bit Dynamic Random Access Memory
中文描述: 262,144字× 16位動態(tài)隨機存取存儲器
文件頁數(shù): 5/27頁
文件大?。?/td> 260K
代理商: HM514260CLTT-6
HM514260C, HM51S4260C Series
5
Operation Mode
The HM51(S)4260C series has the following 11 operation modes.
1. Read cycle
2. Early write cycle
3. Delayed write cycle
4. Read- modify-write cycle
5.
RAS
-only refresh cycle
6.
CAS
-before-
RAS
refresh cycle
7. Self refresh cycle(HM51S4260C)
8. Fast page mode read cycle
9. Fast page mode early write cycle
10. Fast page mode delayed write cycle
11.Fast page mode read- modify-write cycle
Inputs
RAS
LCAS
UCAS
WE
OE
Output
Operation
H
H
H
D
D
Open
Standby
H
L
L
H
L
Valid
Standby
L
L
L
H
L
Valid
Read cycle
L
L
L
L*
2
D
Open
Early write cycle
L
L
L
L*
2
H
Undefined
Delayed write cycle
L
L
L
H to L
L to H
Valid
Read-modify-write cycle
RAS
-only refresh cycle
CAS
-before-
RAS
refresh cycle
L
H
H
D
D
Open
H to L
H
L
D
D
Open
L
H
Self refresh cycle (HM51S4260C)
L
L
L
H to L
H to L
H
L
Valid
Fast page mode read cycle
L
H to L
H to L
L*
2
D
Open
Fast page mode early write cycle
L
H to L
H to L
L*
2
H
Undefined
Fast page mode delayed write cycle
L
H to L
H to L
H to L
L to H
Valid
Fast page mode read-modify-write cycle
L
Notes: 1. H: High(inactive) L: Low(active) D: H or L
2. t
WCS
0 ns
Early write cycle
t
WCS
< 0 ns
Delayed write cycle
3. Mode is determined by the OR function of the
UCAS
and
LCAS
. (Mode is set by the earliest of
UCAS
and
LCAS
active edge and reset by the latest of
UCAS
and
LCAS
inactive edge.) However
write OPERATION and output HIZ control are done independently by each
UCAS
,
LCAS
.
ex. if
RAS
= H to L,
LCAS
= L,
UCAS
= H, then
CAS
-before-
RAS
refresh cycle is selected.
L
L
H
H
Open
Read cycle (Output disabled)
相關(guān)PDF資料
PDF描述
HM514260CLTT-6R 262,144-word x 16-bit Dynamic Random Access Memory
HM514260CLTT-7 262,144-word x 16-bit Dynamic Random Access Memory
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