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參數(shù)資料
| 型號： | HM5259805BTD-75 |
| 廠商： | ELPIDA MEMORY INC |
| 元件分類： | DRAM |
| 英文描述： | 512M LVTTL interface SDRAM 133 MHz/100 MHz 8-Mword 】 16-bit 】 4-bank/16-Mword 】 8-bit 】 4-bank /32-Mword 】 4-bit 】 4-bank PC/133, PC/100 SDRAM |
| 中文描述： | 64M X 8 SYNCHRONOUS DRAM, 5.4 ns, PDSO54 |
| 封裝： | 0.400 INCH, PLASTIC, TSOP2-54 |
| 文件頁數(shù)： | 27/63頁 |
| 文件大小： | 368K |
| 代理商： | HM5259805BTD-75 |
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HM5259165B/HM5259805B/HM5259405B-75/A6
Data Sheet E0118H10
27
Command Intervals
Read command to Read command interval:
1. Same bank, same ROW address:
When another read command is executed at the same ROW address
of the same bank as the preceding read command execution, the second read can be performed after an
interval of no less than 1 clock. Even when the first command is a burst read that is not yet finished, the data
read by the second command will be valid.
READ to READ Command Interval
(same ROW address in same bank)
CLK
Command
Dout
out B3
Address
out B1 out B2
BS
ACTV
Row
Column A
READ
READ
Column B
out A0 out B0
Bank0
Active
Column =A
Read
Column =B
Read
Column =A
Dout
Column =B
Dout
CAS
Latency = 3
Burst Length = 4
Bank 0
2. Same bank, different ROW address:
When the ROW address changes on same bank, consecutive read
commands cannot be executed; it is necessary to separate the two read commands with a precharge command
and a bank-active command.
3. Different bank:
When the bank changes, the second read can be performed after an interval of no less
than 1 clock, provided that the other bank is in the bank-active state. Even when the first command is a burst
read that is not yet finished, the data read by the second command will be valid.
READ to READ Command Interval
(different bank)
CLK
Command
Dout
out B3
Address
out B1 out B2
BS
ACTV
Row 0
Row 1
ACTV
READ
Column A
out A0 out B0
Bank0
Active
Bank3
Active
Bank0
Read
Bank3
Read
READ
Column B
Bank0
Dout
Bank3
Dout
CAS
Latency = 3
Burst Length = 4
相關PDF資料 |
PDF描述 |
|---|---|
| HM5259805BTD-A6 | 512M LVTTL interface SDRAM 133 MHz/100 MHz 8-Mword 】 16-bit 】 4-bank/16-Mword 】 8-bit 】 4-bank /32-Mword 】 4-bit 】 4-bank PC/133, PC/100 SDRAM |
| HM5259805B-75 | Circular Connector; MIL SPEC:MIL-C-26482, Series I, Solder; Body Material:Aluminum; Series:PT06; Number of Contacts:30; Connector Shell Size:18; Connecting Termination:Solder; Circular Shell Style:Straight Plug; Body Style:Straight |
| HM5259405B-75 | Circular Connector; Body Material:Aluminum; Series:PT06; No. of Contacts:30; Connector Shell Size:18; Connecting Termination:Solder; Circular Shell Style:Straight Plug; Circular Contact Gender:Socket; Insert Arrangement:18-30 |
| HM5259805B-A6 | PT 32C 32#20 PIN PLUG |
| HM5264405D | 64M LVTTL interface SDRAM(64M LVTTL接口同步DRAM) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HM5259805BTD-A6 | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M LVTTL interface SDRAM 133 MHz/100 MHz 8-Mword 】 16-bit 】 4-bank/16-Mword 】 8-bit 】 4-bank /32-Mword 】 4-bit 】 4-bank PC/133, PC/100 SDRAM |
| HM5264165 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:HM5264805 HM52654405 Series Synchronous Dynamic RAM |
| HM5264165-10 | 制造商: 功能描述: 制造商:undefined 功能描述: |
| HM5264165A60 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:64M LVTTL interface SDRAM 133 MHz/100 MHz |
| HM5264165B60 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:64M LVTTL interface SDRAM 133 MHz/100 MHz |
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