參數(shù)資料
型號(hào): HM5259805BTD-75
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 512M LVTTL interface SDRAM 133 MHz/100 MHz 8-Mword 】 16-bit 】 4-bank/16-Mword 】 8-bit 】 4-bank /32-Mword 】 4-bit 】 4-bank PC/133, PC/100 SDRAM
中文描述: 64M X 8 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
封裝: 0.400 INCH, PLASTIC, TSOP2-54
文件頁數(shù): 41/63頁
文件大?。?/td> 368K
代理商: HM5259805BTD-75
HM5259165B/HM5259805B/HM5259405B-75/A6
Data Sheet E0118H10
41
V
CC
, V
CC
Q
Power up sequence
Initialization sequence
100
μ
s
0 V
Low
Low
Low
CKE, DQM,
DQMU/DQML
CLK
CS
, DQ
200
μ
s
Power stabilize
Absolute Maximum Ratings
Parameter
Symbol
Value
Unit
Note
Voltage on any pin relative to V
SS
V
T
–0.5 to V
+ 0.5
(
4.6 (max))
V
1
Supply voltage relative to V
SS
Short circuit output current
V
CC
Iout
–0.5 to +4.6
V
1
50
mA
Power dissipation
P
T
Topr
1.2
W
Operating temperature
0 to +70
°C
Storage temperature
Tstg
–55 to +125
°C
Note:
1. Respect to V
SS
.
DC Operating Conditions
(Ta = 0 to +70
C)
Parameter
Symbol
Min
Max
Unit
Notes
Supply voltage
V
CC
, V
CC
Q
V
SS
, V
SS
Q
V
IH
V
IL
3.0
3.6
V
1, 2
0
0
V
3
Input high voltage
2.0
V
CC
+ 0.3
0.8
V
1, 4
Input low voltage
0.3
V
1, 5
Notes: 1. All voltage referred to V
SS
.
2. The supply voltage with all V
CC
and V
CC
Q pins must be on the same level.
3. The supply voltage with all V
SS
and V
SS
Q pins must be on the same level.
4. V
IH
(max) = V
CC
+ 2.0 V for pulse width
3 ns at V
CC
.
5. V
IL
(min) = V
SS
2.0 V for pulse width
3 ns at V
SS
.
相關(guān)PDF資料
PDF描述
HM5259805BTD-A6 512M LVTTL interface SDRAM 133 MHz/100 MHz 8-Mword 】 16-bit 】 4-bank/16-Mword 】 8-bit 】 4-bank /32-Mword 】 4-bit 】 4-bank PC/133, PC/100 SDRAM
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參數(shù)描述
HM5259805BTD-A6 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M LVTTL interface SDRAM 133 MHz/100 MHz 8-Mword 】 16-bit 】 4-bank/16-Mword 】 8-bit 】 4-bank /32-Mword 】 4-bit 】 4-bank PC/133, PC/100 SDRAM
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