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參數(shù)資料
| 型號： | HM5264165A60 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 64M LVTTL interface SDRAM 133 MHz/100 MHz |
| 中文描述： | 6400 LVTTL接口SDRAM的133 MHz/100 MHz的 |
| 文件頁數(shù)： | 24/67頁 |
| 文件大?。?/td> | 870K |
| 代理商： | HM5264165A60 |
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HM5264165F/HM5264805F/HM5264405F-75/A60/B60
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2. Single write:
A single write operation is enabled by setting OPCODE (A9, A8) to (1, 0). In a single write
operation, data is only written to the column address (AY0 to AY7; HM5264165F, AY0 to AY8;
HM5264805F, AY0 to AY9; HM5264405F) and the bank select address (A12/A13) specified by the write
command set cycle without regard to the burst length setting. (The latency of data input is 0 clock).
WRIT
CLK
Command
Din
ACTV
Row
Column
in 0
Address
t
RCD
Auto Precharge
Read with auto-precharge:
In this operation, since precharge is automatically performed after completing a
read operation, a precharge command need not be executed after each read operation. The command executed
for the same bank after the execution of this command must be the bank active (ACTV) command. In
addition, an interval defined by l
APR
is required before execution of the next command.
CAS
latency
Precharge start cycle
3
2 cycle before the final data is output
2
1 cycle before the final data is output
Burst Read (Burst Length = 4)
CLK
lAPR
lRAS
lAPR
CL=2 Command
CL=3 Command
DQ (input)
DQ (input)
Note: Internal auto-precharge starts at the timing indicated by " ".
And an interval of t
RAS
(l
RAS
) is required between previous active (ACTV) command and internal precharge " ".
ACTV
READ A
ACTV
out3
out2
out1
out0
lRAS
ACTV
READ A
ACTV
out3
out2
out1
out0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HM5264165B60 | 64M LVTTL interface SDRAM 133 MHz/100 MHz |
| HM5264165FTT-75 | 64M LVTTL interface SDRAM 133 MHz/100 MHz |
| HM5264805FTT-75 | 64M LVTTL interface SDRAM 133 MHz/100 MHz |
| HM5264405FTT-75 | 64M LVTTL interface SDRAM 133 MHz/100 MHz |
| HM5264165FTT-A60 | 64M LVTTL interface SDRAM 133 MHz/100 MHz |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HM5264165B60 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:64M LVTTL interface SDRAM 133 MHz/100 MHz |
| HM5264165D-B60/4805D-B60/4405D-B60 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:64M LVTTL Interface SDRAM 100 MHz 1-Mword X 1 |
| HM5264165DLTT-80 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 SDRAM |
| HM5264165DLTT-B60 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 SDRAM |
| HM5264165DTT-80 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 SDRAM |
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