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參數(shù)資料
| 型號： | HM5425161B |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 256M SSTL_2 interface DDR SDRAM(256M SSTL_2接口 DDR 同步DRAM) |
| 中文描述： | 256M DDR SDRAM的接口SSTL_2（256M SSTL_2接口的DDR同步DRAM）的 |
| 文件頁數(shù)： | 13/62頁 |
| 文件大小： | 1016K |
| 代理商： | HM5425161B |
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HM5425161B, HM5425801B, HM5425401B Series
13
Read with auto-precharge [READA]:
This command starts a read operation. After completion of the read
operation, precharge is automatically executed.
Column address strobe and write command [WRIT]:
This command starts a write operation. The start
address of the burst write is determined by the column address (AY0 to AY8; the HM5425161B, AY0 to
AY9; the HM5425801B, AY0 to AY9, AY11; the HM5425401B) and the bank select address (BA).
Write with auto-precharge [WRITA]:
This command starts a write operation. After completion of the
write operation, precharge is automatically executed.
Row address strobe and bank activate [ACTV]:
This command activates the bank selected by A13/A14
(BA) and determines a row address (AX0 to AX12). When A13 = A14 = Low, bank 0 is activated. When
A13 = High and A14 = Low, bank 1 is activated. When A13 = Low and A14 = High, bank 2 is activated.
When A13 = A14 = High, bank 3 is activated.
Precharge selected bank [PRE]:
This command starts a pre-charge operation for the bank selected by
A13/A14.
Precharge all banks [PALL]:
This command starts a precharge operation for all banks.
Refresh [REF/SELF]:
This command starts a refresh operation. There are two types of refresh operation,
one is auto-refresh, and another is self-refresh. For details, refer to the CKE truth table section.
Mode register set/Extended mode register set [MRS/EMRS]:
The DDR SDRAM has the two mode
registers, the mode register and the extended mode register, to defines how it works. The both mode registers
are set through the address pins (the A0 to the A14) in the mode register set cycle. For details, refer to "Mode
register and extended mode register set".
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HM5425401B | 256M SSTL_2 interface DDR SDRAM(256M SSTL_2接口 DDR 同步DRAM) |
| HM5425801B | 256M SSTL_2 interface DDR SDRAM(256M SSTL_2接口 DDR 同步DRAM) |
| HM6116LP-2 | 2048-word X 8bit High Speed CMOS Static RAM |
| HM6116LP-3 | 2048-word X 8bit High Speed CMOS Static RAM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HM5425161B/801B/401B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Series 256M SSTL-2 Interface DDR SDRAM 143 MHz/133 MHz/125 |
| HM5425161BTT-10 | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M SSTL_2 interface DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-Mword 】 16-bit 】 4-bank/8-Mword 】 8-bit 】 4-bank/ 16-Mword 】 4-bit 】 4-bank |
| HM5425161BTT-75A | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M SSTL_2 interface DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-Mword 】 16-bit 】 4-bank/8-Mword 】 8-bit 】 4-bank/ 16-Mword 】 4-bit 】 4-bank |
| HM5425161BTT-75B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M SSTL_2 interface DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-Mword 】 16-bit 】 4-bank/8-Mword 】 8-bit 】 4-bank/ 16-Mword 】 4-bit 】 4-bank |
| HM5425401B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M SSTL_2 interface DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-Mword 】 16-bit 】 4-bank/8-Mword 】 8-bit 】 4-bank/ 16-Mword 】 4-bit 】 4-bank |
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