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參數(shù)資料
| 型號： | HMC714LP5E |
| 廠商： | HITTITE MICROWAVE CORP |
| 元件分類： | 檢測器 |
| 英文描述： | 100 MHz - 5800 MHz RF/MICROWAVE LINEAR DETECTOR, 15 dBm INPUT POWER-MAX |
| 封裝： | 5 X 5 MM, ROHS COMPLIANT, PLASTIC, SMT, 32 PIN |
| 文件頁數(shù)： | 33/40頁 |
| 文件大?。?/td> | 1985K |
| 代理商： | HMC714LP5E |
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For price, delivery, and to place orders, please contact Hittite Microwave Corporation:
20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373
Order On-line at www.hittite.com
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12 - 164
DC Offset Cancellation Loop Bandwith
Hz
For example: loop bandwidth for DC cancellation with COFS = 1nF, bandwidth is ~62 kHz
Note: The measurement error produced by internal DC offsets cannot be measured repeatably at any single operating
point, in terms of input signal frequency and level. Measurement error must be calculated to a best fit line, over the
entire range of input signal (again, in terms of signal level and frequency).
Adjusting VTGT for Greater Precision
There are two competing aspects of performance, for which VTGT can be used to set a preference. Depending on
which aspect of precision is more important to the application, the VTGT pin can be used to find a compromise between
two sources of RMS output error: internal DC offset cancellation error and deviation at high crest factors (>12dB).
Increasing VTGT input voltage will reduce the effect of internal DC offsets, but deviation at high crest factors
will increase slightly. A 50% increase in VTGT should produce an 18% improvement in RMS precision due to a
reduction in internal DC offsets effects.
Decreasing VTGT input voltage will reduce errors at high crest factors, but internal DC offsets will have more
of an effect on measurement accuracy.
If input signal crest factor is not expected to exceed 10dB, you can improve RMS precision by increasing VTGT voltage.
Keep in mind that changing VTGT also adjusts the log-intercept point, which shifts the “input dynamic range”. The best
set-point for VTGT will be the lowest voltage that still maintains the “input dynamic range” over the required range of
input power. This new VTGT set-point should optimize the amount of DC offset related errors.
If error performance at high crest factors requires optimization, set VTGT for the maximum tolerable error at the
highest expected crest factor. Increasing VTGT beyond that point will unnecessarily compromise internal DC offset
cancellation performance. After changing VTGT, re-verify that the “input dynamic range” still covers the required range
of input power.
VTGT should be referenced to VREF for best performance. It is recommended to use a temperature stable DC amplifier
between VTGT and VREF to create VTGT > VREF. The VREF pin is a temperature compensated voltage reference output,
only intended for use with VTGT.
V
GTG
Error due to
internal DC offsets
1.0 V
nominal + 0.2 dB
1.5 V
nominal + 0.1 dB
2.0 V
nominal
3.0 V
7.nominal + 0.06 dB
3.5 V
nominal + 0.1 dB
VTGT influence on DC offset compensation
1
≈
π(500)(C
OFS
+ 20 x 1012)
-3
-2.5
-2
-1.5
-1
-0.5
0
2
4
6
8
10
12
14
VTGT=0.5V
VTGT=1V
VTGT=2V
VTGT=3V
CREST FACTOR (dB)
RMSA/RMSB
ERROR
(dB)
RMS Output Error vs. Crest Factor
DC Offset Compensation Loop (Continued)
HMC714LP5 / 714LP5E
v07.1109
DUAL RMS POWER DETECTOR
0.1 - 5.8 GHz
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