參數(shù)資料
型號(hào)： HMS81C2020AQ
廠商： Electronic Theatre Controls, Inc.
英文描述： CMOS Single-Chip 8-Bit Microcontroller with A/D Converter & VFD Driver
中文描述： CMOS單芯片8位微控制器與A / D轉(zhuǎn)換器
文件頁(yè)數(shù)： 67/107頁(yè)
文件大小： 1482K
代理商： HMS81C2020AQ
HMS81C2012A/2020A
SEP. 2004 Ver 2.00
63
Serial I/O Mode Register(SIOM) controls serial I/O func-
tion. According to SCK1 and SCK0, the internal clock or
external clock can be selected. The serial transmission op-
eration mode is decided by setting the SM1 and SM0, and
the polarity of transfer clock is selected by setting the POL.
Serial I/O Data Register(SIOR) is a 8-bit shift register.
First LSB is send or is received. When receiving mode, se-
rial input pin is selected by IOSW. The SPI allows 8-bits
of data to be synchronously transmitted and received.
To accomplish communication, typically three pins are
used:
- Serial Data In
- Serial Data Out
- Serial Clock
R54/SIN
R55/SOUT
R53/SCLK
.
Figure 14-2 SPI Control Register
BTCL
7
6
5
4
3
2
1
0
IOSW
POL
SIOST
Serial transmission status bit
0: Serial transmission is in progress
1: Serial transmission is completed
Serial transmission Clock selection
00: f
XIN
÷
4
01: f
÷
16
10: TMR0OV(Timer0 Overflow)
11: External Clock
INITIAL VALUE: 0000 0001
B
ADDRESS: 0E0
H
SIOM
SIOSF
Serial Input Pin Selection bit
0: SIN Pin Selection
1: IOSWIN Pin Selection
R/W
R/W
R/W
R/W
R/W
R
Serial transmission start bit
Setting this bit starts an Serial transmission.
After one cycle, bit is cleared to “0” by hardware.
SM1
SM0
R/W
Serial transmission Operation Mode
00: Normal Port(R55,R54,R53)
01: Sending Mode(SOUT,R54,SCLK)
10: Receiving Mode(R55,SIN,SCLK)
11: Sending & Receiving Mode(SOUT,SIN,SCLK)
INITIAL VALUE: Undefined
ADDRESS: 0E1
SIOR
BTCL
7
6
5
4
3
2
1
0
R/W R/W R/W R/W
R/W R/W
R/W
R/W
Sending Data at Sending Mode
Receiving Data at Receiving Mode
Serial Clock Polarity Selection bit
0: Data Transmission at Falling Edge
Received Data Latch at Rising Edge
1: Data Transmission at Rising Edge
Received Data Latch at Falling Edge
R/W
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