參數(shù)資料
型號(hào)： HSP43216VC-52
廠(chǎng)商： INTERSIL CORP
元件分類(lèi)： 數(shù)字信號(hào)處理外設(shè)
英文描述： Halfband Filter
中文描述： 16-BIT, DSP-DIGITAL FILTER, PQFP100
封裝： 14 X 20 MM, PLASTIC, MS-022GC, MQFP-100
文件頁(yè)數(shù)： 4/19頁(yè)
文件大?。?/td> 144K
代理商： HSP43216VC-52
3-196
84 LEAD PLCC
TOP VIEW
Pinouts
(Continued)
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
G
M
M
B
B
B
B
B
B
G
B
B
B
B
B
B
B
B
B
B
V
C
G
O
R
SYNC
USB/LSB
INT/EXT
BIN0
BIN1
BIN2
BIN3
BIN4
BIN5
BIN6
BIN7
BIN8
BIN9
BIN10
BIN11
BIN12
BIN13
BIN14
BIN15
RND0
RND1
V
GND
AOUT15
AOUT14
AOUT13
AOUT12
AOUT11
AOUT10
AOUT9
AOUT8
AOUT7
AOUT6
AOUT5
GND
FMT
OEA
AOUT4
AOUT3
AOUT2
AOUT1
AOUT0
V
C
C
11 10 9 8 7 6 5 4 3 2 1 84 83 82 81 80 79 78 77 76 75
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
Pin Description
NAME
TYPE
DESCRIPTION
V
CC
GND
-
+5V Power.
-
Ground.
CLK
I
Clock Input. (CMOS LEVEL). f
S
is the frequency of CLK
Input Data Bus A. AIN0 is the LSB. Input data format is 16-bit Two’s Complement.
AIN0-15
I
BIN0-15
I
Input Data Bus B. BIN0 is the LSB. Input data format is 16-bit Two’s Complement.
MODE0-1
I
The Mode Select Inputs set one of four operational modes as highlighted in Table 1.
INT/EXT
I
The Internal\External multiplexer select inputs set whether the data multiplex/demultiplex function required in the various
operational modes is performed internally (High State) or externally to the chip (Low State).
SYNC
I
This input is used to synchronize the input sample stream with the zero degree phase of the up or down convert Local
Oscillators. In the straight decimate modes, this input can be use to synchronize the input sample stream with a particular
phase of the halfband filter. (See the Operational Modes Section for additional information).
USB/LSB
I
The Upper and Lower Sideband select line is used to specify the direction of frequency translation imparted on the data
stream in the Down Convert and Decimate Mode and in the Quadrature to Real Convert Mode. (See Operational Modes
Section for additional information).
RND0-2
I
The Round Select inputs set the number of output bits from eight (RND = 000) to sixteen (RND = 110). Least significant
output bits are zeroed. See Table 4.
OEA
I
Three-State Control Output Bus A, OUTA0-15. Active Low.
OEB
I
Three-State Control Output Bus B, OUTB0-15. Active Low.
FMT
I
The Format select input is used to convert the two’s complement output to offset binary (unsigned). When asserted high,
the AOUT15 and BOUT15 bits are inverted from the normal two’s complement representation.
AOUT0-15
O
Output Bus A. AOUT0 is the LSB.
BOUT0-15
O
Output Bus B. BOUT0 is the LSB.
HSP43216
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PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HSP43216VC-52Z 功能描述:有源濾波器 W/ANNEAL HALFB & FILER 100 PIN PQFP RoHS:否 制造商:Maxim Integrated 通道數(shù)量:1 截止頻率:150 KHz 電源電壓-最大:11 V 電源電壓-最小:4.74 V 最大工作溫度:+ 85 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP N 封裝:Tube
HSP43220 制造商:INTERSIL 制造商全稱(chēng):Intersil Corporation 功能描述:Decimating Digital Filter
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