參數(shù)資料
型號(hào)： HSP43216VC-52
廠商： INTERSIL CORP
元件分類： 數(shù)字信號(hào)處理外設(shè)
英文描述： Halfband Filter
中文描述： 16-BIT, DSP-DIGITAL FILTER, PQFP100
封裝： 14 X 20 MM, PLASTIC, MS-022GC, MQFP-100
文件頁(yè)數(shù)： 5/19頁(yè)
文件大小： 144K
代理商： HSP43216VC-52
3-197
Functional Description
The operation of the HSP43216 centers around a fixed
coefficient, 67-Tap, Halfband Filter Processor as shown in
Figure 1. The Halfband Filter Processor operates stand
alone to provide two fundamental modes of operation:
interpolate or decimate by two filtering of a real signal. In two
other modes, the Quadrature Up/Down Convert circuitry
operates together with the Filter Processor block to provide
f
S
/4 Down Conversion with decimate by 2 filtering or
Quadrature to Real Conversion.
In Down Convert and Decimate mode, a real input sample
stream is spectrally shifted by f
S
/4. Each component of the
resulting complex signal is then halfband filtered and
decimated by 2 to produce real and imaginary output
samples at half of the input data rate.
In Quadrature to Real Conversion mode, the real and
imaginary components of a quadrature input are interpolated
by two and halfband filtered. The filtered result is then
spectrally shifted by f
S
/4 and the real component of this
operation is output at twice the input sample rate.The
HSP43216 is configured for different operational modes by
setting the state of the mode control pins, MODE1-0 as
shown in Table 1.
Input Data Flow Controller
The Input Data Flow Controller routes data samples from the
AIN0-15 and BIN0-15 inputs to the internal processing
elements of the Halfband. The data routing paths are based
on mode of operation and are more fully discussed in the
Operational Modes section.
f
S
/4 Quadrature Down Convert Processor
The f
S
/4 Quadrature Down Convert Processor operates as a
Quadrature LO which provides the negative f
S
/4 spectral
shift required to center the upper sideband of a real input
signal at DC. This operation is equivalent to multiplying the
real sample stream, x(n), by the quadrature components of
the complex exponential e
-j(
π
/2)n
as given below:
R
E
G
M
U
X
f
S
/4
L.O.
MUX
MUX
1,-1,1,..
-1,1,-1,.
1
1
EVEN TAP
FILTER
MUX
MUX
1
1
...,2,-2,2
..,-2,2,-2
M
U
X
ODD TAP
FILTER
AIN0-15
BIN0-15
BOUT0-15
AOUT0-15
OEA
OEB
USB/LSB
R
E
G
R
E
G
R
E
G
R
E
G
R
E
G
R
E
G
R
E
G
R
E
G
R
N
D
F
M
T
R
E
G
R
E
G
R
N
D
F
M
T
R
E
G
R
E
G
R
E
G
R
E
G
2
2
Indicates elements which operate at CLK/2 when the INT/EXT control input is high.
SYNC
INT/EXT
RND0-2
FMT
USB/LSB
MODE0-1
INPUT DATA FLOW
CONTROLLER
f
/4 QUADRATURE
DOWN CONVERT
PROCESSOR
67-TAP HALFBAND
FILTER
PROCESSOR
f
S
/4 QUADRATURE
UP CONVERT
PROCESSOR
OUTPUT DATA FLOW
CONTROLLER
DELAY 19
DELAY 2 - 35
SYNC
+
FIGURE 1. HALFBAND BLOCK DIAGRAM
CLK
PIPELINE
PIPELINE
TABLE 1. MODE SELECT TABLE
MODE1-0
MODE
00
Decimate by Two
01
Interpolate by Two
10
Down Convert and Decimate
11
Quadrature to Real Conversion
x n
ej
π
n 2
(
)
–
x n
π
n 2
(
)
jx n
π
–
n 2
(
)
sin
+
cos
=
(EQ. 1)
HSP43216
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HSP43216VC-52Z 功能描述:有源濾波器 W/ANNEAL HALFB & FILER 100 PIN PQFP RoHS:否 制造商:Maxim Integrated 通道數(shù)量:1 截止頻率:150 KHz 電源電壓-最大:11 V 電源電壓-最小:4.74 V 最大工作溫度:+ 85 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP N 封裝:Tube
HSP43220 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Decimating Digital Filter
HSP43220/883 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Decimating Digital Filter
HSP43220_04 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Decimating Digital Filter
HSP43220883 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Decimating Digital Filter
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