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參數(shù)資料
| 型號： | HSP43216VC-52Z |
| 廠商： | Intersil |
| 文件頁數(shù)： | 14/20頁 |
| 文件大小： | 0K |
| 描述： | IC HALFBAND FILTER 100-MQFP |
| 標準包裝： | 66 |
| 濾波器類型： | 半帶 |
| 濾波器數(shù)： | 4 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-BQFP |
| 供應(yīng)商設(shè)備封裝： | 100-MQFP（14x20） |
| 包裝： | 托盤 |
3
FN3365.10
October 6, 2008
HSP43216
(84 LD PLCC)
TOP VIEW
Pinouts (Continued)
AIN0
AIN1
AIN2
AIN3
AIN4
AIN9
AIN8
AIN7
AIN6
AIN5
AIN15
AIN14
AIN13
AIN12
AIN1
1
AIN10
GN
D
MODE
1
MODE
0
BOUT15
BOUT14
BOUT13
BOUT12
BOUT1
1
BOUT10
GND
BOUT
9
BOUT
8
BOUT
7
BOUT
6
BOUT
5
BOUT
4
BOUT
3
BOUT
2
BOUT
1
BOUT
0
V
CC
GND
OE
B
RN
D2
SYNC
USB/LSB
INT/EXT
BIN0
BIN1
BIN2
BIN3
BIN4
BIN5
BIN6
BIN7
BIN8
BIN9
BIN10
BIN11
BIN12
BIN13
BIN14
BIN15
RND0
RND1
VCC
FMT
OEA
GND
AOUT15
AOUT14
AOUT13
AOUT12
AOUT11
AOUT10
AOUT9
AOUT8
AOUT7
AOUT6
AOUT5
AOUT4
AOUT3
AOUT2
AOUT1
AOUT0
GND
V
CC
CLK
11 10 9 8 7 6 5 4 3 2 1 84 83828180 79787776 75
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
Pin Description
NAME
TYPE
DESCRIPTION
VCC
-
+5V Power.
GND
-
Ground.
CLK
I
Clock Input. (CMOS LEVEL). fS is the frequency of CLK
AIN0-15
I
Input Data Bus A. AIN0 is the LSB. Input data format is 16-bit Two’s Complement.
BIN0-15
I
Input Data Bus B. BIN0 is the LSB. Input data format is 16-bit Two’s Complement.
MODE0-1
I
The Mode Select Inputs set one of four operational modes as highlighted in Table 1.
INT/EXT
I
The Internal\External multiplexer select inputs set whether the data multiplex/demultiplex function required in the various
operational modes is performed internally (High State) or externally to the chip (Low State).
SYNC
I
This input is used to synchronize the input sample stream with the zero degree phase of the up or down convert Local
Oscillators. In the straight decimate modes, this input can be use to synchronize the input sample stream with a particular
phase of the halfband filter. (See the Operational Modes Section for additional information).
USB/LSB
I
The Upper and Lower Sideband select line is used to specify the direction of frequency translation imparted on the data
stream in the Down Convert and Decimate Mode and in the Quadrature to Real Convert Mode. (See Operational Modes
Section for additional information).
RND0-2
I
The Round Select inputs set the number of output bits from eight (RND = 000) to sixteen (RND = 110). Least significant
output bits are zeroed. See Table 4.
OEA
I
Three-State Control Output Bus A, OUTA0-15. Active Low.
OEB
I
Three-State Control Output Bus B, OUTB0-15. Active Low.
FMT
I
The Format select input is used to convert the two’s complement output to offset binary (unsigned). When asserted high,
the AOUT15 and BOUT15-bits are inverted from the normal two’s complement representation.
AOUT0-15
O
Output Bus A. AOUT0 is the LSB.
BOUT0-15
O
Output Bus B. BOUT0 is the LSB.
HSP43216
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