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參數(shù)資料
| 型號： | HSP43216VC-52Z |
| 廠商： | Intersil |
| 文件頁數(shù)： | 6/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC HALFBAND FILTER 100-MQFP |
| 標(biāo)準(zhǔn)包裝： | 66 |
| 濾波器類型： | 半帶 |
| 濾波器數(shù)： | 4 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-BQFP |
| 供應(yīng)商設(shè)備封裝： | 100-MQFP（14x20） |
| 包裝： | 托盤 |
14
FN3365.10
October 6, 2008
scaled by two to compensate for the attenuation
introduced by the interpolation process.
The Quadrature to Real Conversion mode is most easily
understood by first considering an implementation using a
7 tap transversal filter as shown in Figure 19. By examining
the combination of interpolation, filtering, and up
conversion it is seen that a particular output is only
dependent on the sum-of-products for the even indexed
samples and coefficients or the sum-of-products for the odd
indexed samples and coefficients. This computational
partitioning allows the dual interpolation filters required in
this mode to be realized using the same polyphase filter
structure used in the other modes. A functional block
diagram of the polyphase implementation for Quadrature to
Real Conversion mode is shown in Figure 20. In this
implementation, the real and imaginary components of a
complex input stream drive the even and odd tap filters.
The output of each filter is then modulated by the non-zero
mix factors and multiplexed into a single real output stream.
FIGURE 18. QUADRATURE TO REAL CONVERSION
REAL OUTPUT
UPCONVERTED SIGNAL
FILTER PASSBAND
INPUT SIGNAL SPECTRUM
0f’S/2
f’S
-f’S/2
0
f’S/2
f’S
-f’S/2
0fS
2fS
-fS
fS = INPUT SAMPLE RATE
INTERPOLATED SIGNAL
0f’S/2
f’S
-f’S/2
f’S = INTERPOLATED SAMPLE RATE, 2fS
C0 C1 C2 C3 C4 C5 C6
0,1,0,-1...
-1,0,1,0...
HALFBAND FILTER
..R1,R0
2
..R1,0,R0,0
C0 C1 C2 C3 C4 C5 C6
..,Y2,Y1,Y0
..I1,I0
2
..I1,0,I0,0
Y(0) = 0(0(C0)+R0(C1)+0(C2)+R1(C3)+0(C4)+R2(C5)+0(C6))+
-1(0(C0)+I0(C1)+0(C2)+I1(C3)+0(C4)+I2(C5)+0(C6))
Y(1) = 1(R0(C0)+0(C1)+R1(C2)+0(C3)+R2(C4)+0(C5)+R3(C6))+
0(I0(C0)+0(C1)+I1(C2)+0(C3)+I2(C4)+0(C5)+I3(C6))
Y(2) = 0(0(C0)+R1(C1)+0(C2)+R2(C3)+0(C4)+R3(C5)+0(C6))+
1(0(C0)+I1(C1)+0(C2)+I2(C3)+0(C4)+I3(C5)+0(C6))
Y(3) = -1(R1(C0)+0(C1)+R2(C2)+0(C3)+R3(C4)+0(C5)+R4(C6))+
0(I1(C0)+0(C1)+I2(C2)+0(C3)+I3(C4)+0(C5)+I4(C6))
HALFBAND FILTER
COS((
n+1)π/2)
SIN(-(
n+1)π/2)
+
FIGURE 19. QUADRATURE TO REAL CONVERTER USING
TRANSVERSAL FILTERS
Y(0) = -1(I0(C1)+I1(C3))+I2(C5))
Y(1) = 1(R0(C0)+R1(C2)+R2(C4))+R3(C6))
Y(2) = 1(I1(C1)+I2(C3)+I3(C5))
Y(3) = -1(R1(C0)+R2(C2)+R3(C4)+R4(C6))
C0 C2 C4 C6
C1 C3 C5
R
E
G
ODD TAP FILTER
EVEN TAP FILTER
1,-1,1,-1,..
-1,1,-1,1..
COS LO
SIN LO
..R1,R0
..I1,I0
M
U
X
..,Y2,Y1,Y0
FIGURE 20. POLYPHASE IMPLEMENTATION OF
QUADRATURE TO REAL CONVERTER
HSP43216
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