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參數(shù)資料
| 型號(hào)： | HUF75531SK8 |
| 廠商： | INTERSIL CORP |
| 元件分類： | JFETs |
| 英文描述： | 6A, 80V, 0.030 Ohm, N-Channel, UltraFET Power MOSFET |
| 中文描述： | 6 A, 80 V, 0.03 ohm, N-CHANNEL, Si, POWER, MOSFET, MS-012AA |
| 封裝： | PLASTIC, SO-8 |
| 文件頁數(shù)： | 7/12頁 |
| 文件大?。?/td> | 183K |
| 代理商： | HUF75531SK8 |
7
R
θ
JA
for the device as a function of the top copper
(component side) area. This is for a horizontally positioned
FR-4 board with 1oz copper after 1000 seconds of steady
state power with no air flow. This graph provides the
necessary information for calculation of the steady state
junction temperature or power dissipation. Pulse
applications can be evaluated using the Intersil device Spice
thermal model or manually utilizing the normalized maximum
transient thermal impedance curve.
Displayed on the curve are R
θ
JA
values listed in the Electrical
Specifications table. The points were chosen to depict the
compromise between the copper board area, the thermal
resistance and ultimately the power dissipation, P
DM
.
Thermal resistances corresponding to other copper areas can
be obtained from Figure 20 or by calculation using Equation 2.
R
θ
JA
is defined as the natural log of the area times a coefficient
added to a constant. The area, in square inches is the top
copper area including the gate and source pads.
The transient thermal impedance (Z
θ
JA
) is also effected by
varied top copper board area. Figure 21 shows the effect of
copper pad area on single pulse transient thermal
impedance. Each trace represents a copper pad area in
square inches corresponding to the descending list in the
graph. Spice and SABER thermal models are provided for
each of the listed pad areas.
Copper pad area has no perceivable effect on transient
thermal impedance for pulse widths less than 100ms. For
pulse widths less than 100ms the transient thermal
impedance is determined by the die and package. Therefore,
CTHERM1 through CTHERM5 and RTHERM1 through
RTHERM5 remain constant for each of the thermal models. A
listing of the model component values is available in Table 1.
(EQ. 2)
R
θ
JA
83.2
23.6
Area
(
)
ln
×
–
=
FIGURE 20. THERMAL RESISTANCE vs MOUNTING PAD AREA
120
160
200
240
0.1
1.0
80
0.01
R
θ
JA
= 83.2 - 23.6*
ln
(AREA)
152
o
C/W - 0.054in
2
189
o
C/W - 0.0115in
2
R
θ
J
(
o
C
AREA, TOP COPPER AREA (in
2
)
FIGURE 21. THERMAL IMPEDANCE vs MOUNTING PAD AREA
30
60
90
120
150
0
10
-1
10
0
10
1
10
2
10
3
t, RECTANGULAR PULSE DURATION (s)
Z
θ
J
,
COPPER BOARD AREA - DESCENDING ORDER
0.04 in
2
0.28 in
2
0.52 in
2
0.76 in
2
1.00 in
2
I
o
C
HUF75531SK8
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HUF75531SK8T | 功能描述:MOSFET 6a 80V N-Ch MOSFET RoHS:否 制造商:STMicroelectronics 晶體管極性:N-Channel 汲極/源極擊穿電壓:650 V 閘/源擊穿電壓:25 V 漏極連續(xù)電流:130 A 電阻汲極/源極 RDS（導(dǎo)通）:0.014 Ohms 配置:Single 最大工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:Max247 封裝:Tube |
| HUF75542P3 | 功能描述:MOSFET 75a 80V N-Ch UltraFET 0.014 Ohm RoHS:否 制造商:STMicroelectronics 晶體管極性:N-Channel 汲極/源極擊穿電壓:650 V 閘/源擊穿電壓:25 V 漏極連續(xù)電流:130 A 電阻汲極/源極 RDS（導(dǎo)通）:0.014 Ohms 配置:Single 最大工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:Max247 封裝:Tube |
| HUF75542P3 | 制造商:Fairchild Semiconductor Corporation 功能描述:MOSFET N CH 80V 75A TO220AB 制造商:Fairchild Semiconductor Corporation 功能描述:MOSFET, N CH, 80V, 75A, TO220AB 制造商:Fairchild Semiconductor Corporation 功能描述:MOSFET, N CH, 80V, 75A, TO220AB; Transistor Polarity:N Channel; Continuous Drain Current Id:75A; Drain Source Voltage Vds:80V; On Resistance Rds(on):14mohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs Typ:4V; No. of Pins:3 ;RoHS Compliant: Yes |
| HUF75542P3 | 制造商:Fairchild Semiconductor Corporation 功能描述:TRANSISTOR TYPE:MOSFET ((NW)) |
| HUF75542P3_NL | 制造商:Fairchild Semiconductor Corporation 功能描述: |
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