參數(shù)資料
型號(hào): HV7131R
廠商: Electronic Theatre Controls, Inc.
元件分類: 圖像傳感器
英文描述: CMOS Image Sensor
中文描述: CMOS圖像傳感器
文件頁(yè)數(shù): 17/33頁(yè)
文件大小: 1481K
代理商: HV7131R
Confidential
HV7131R
This document is a general product description and is subject to change without notice. MagnaChip
Semiconductor Ltd. does not assume any responsibility for use of circuits described and no patent
licenses are implied.
- 17 -
2004 MagnaChip Semiconductor Ltd.
Vertical Blanking Time Low [VBLL : 23h : 08h]
7
6
5
4
3
2
1
0
VBLANK Time[7:0]
0
0
0
0
1
0
0
0
VBLANK Time register defines active high duration of VSYNC output. Active high VSYNC
indicates frame boundary between continuous frames For VSYNC-HSYNC timing relation in the
frame transition, please refer to Frame Timing section
Integration Time High [INTH: 25h : 06h]
7
6
5
4
3
2
1
0
Integration Time [23:16]
0
0
0
0
0
1
1
0
Integration Time Middle [INTM: 26h: 5bh]
7
6
5
4
3
2
1
0
Integration Time [15:8]
0
1
0
1
1
0
1
1
Integration Time Low [INTL: 27h: 9ah]
7
6
5
4
3
2
1
0
Integration Time [7:0]
1
0
0
1
1
0
1
0
Integration time value register defines the time during which active pixel element evaluates
photon energy that is converted to digital data output by internal ADC processing. Integration
time is equivalent to exposure time of general camera. So that integration time need to be
increased in dark environment and decreased in bright environment. Maximum value of
integration time is (2
24
-1) x sensor clock period (80ns, SCF 12.5MHz @ DCF 25MHz) = 1.34sec
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