參數(shù)資料
型號(hào): HY27SS561M
廠商: Hynix Semiconductor Inc.
英文描述: 256Mbit (32Mx8bit / 16Mx16bit) NAND Flash
中文描述: 片256Mbit(32Mx8bit / 16Mx16bit)NAND閃存
文件頁(yè)數(shù): 34/44頁(yè)
文件大?。?/td> 733K
代理商: HY27SS561M
Rev 0.7 / Oct. 2004
34
HY27SS(08/16)561M Series
HY27US(08/16)561M Series
256Mbit (32Mx8bit / 16Mx16bit) NAND Flash
Note: 1. A0-A7 is the address in the Spare Memory area, where A0-A3 are valid and A4-A7 are don't care.
2. Only address cycle 4 is required.
Figure 28. Read C Operation, One Page AC Waveform
I/O
WE
CE
CLE
ALE
Data M
Data
Last
tWHBH
tWHALL
tBHRL
tALLRL2
Command
Code
Address M Input
Busy
Data Output from M to
Last Byte or Word in Area C
RE
RB
Add. M
cycle 1
50h
Add. M
cycle 2
Add. M
cycle 3
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