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參數(shù)資料
| 型號： | HY29LV160BT-12 |
| 廠商： | HYNIX SEMICONDUCTOR INC |
| 元件分類： | DRAM |
| 英文描述： | 16 Mbit (2M x 8/1M x 16) Low Voltage Flash Memory |
| 中文描述： | 1M X 16 FLASH 2.7V PROM, 120 ns, PDSO48 |
| 封裝： | TSOP-48 |
| 文件頁數(shù)： | 21/48頁 |
| 文件大?。?/td> | 517K |
| 代理商： | HY29LV160BT-12 |
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21
Rev. 1.2/May 01
HY29LV160
When the system detects that DQ[7] has changed
from the complement to true data (or
“
0
”
to
“
1
”
for
erase), it should do an additional read cycle to read
valid data from DQ[7:0]. This is because DQ[7]
may change asynchronously with respect to the
other data bits while Output Enable (OE#) is as-
serted low.
Figure 7 illustrates the Data# Polling test algorithm.
DQ[6] - Toggle Bit I
Toggle Bit I on DQ[6] indicates whether an Auto-
matic Program or Erase algorithm is in progress
or complete, or whether the device has entered
the Erase Suspend mode. Toggle Bit I may be
read at any address, and is valid after the rising
edge of the final WE# pulse in the Program or
Erase command sequence, including during the
sector erase time-out. The system may use ei-
ther OE# or CE# to control the read cycles.
Successive read cycles at any address during an
Automatic Program algorithm operation (including
programming while in Erase Suspend mode)
cause DQ[6] to toggle. DQ[6] stops toggling when
the operation is complete. If a program address
falls within a protected sector, DQ[6] toggles for
approximately 1 μs after the program command
sequence is written, then returns to reading array
data.
Table 11. Write and Erase Operation Status Summary
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Notes:
1. A valid address is required when reading status information. See text for additional information.
2. DQ[5] status switches to a
‘
1
’
when a program or erase operation exceeds the maximum timing limit.
3. A
‘
1
’
during sector erase indicates that the 50 μs time-out has expired and active erasure is in progress. DQ[3] is not
applicable to the chip erase operation.
4. Equivalent to
‘
No Toggle
’
because data is obtained in this state.
5. Data (DQ[7:0]) = 0xFF immediately after erasure.
6. Programming can be done only in a non-suspended sector (a sector not specified for erasure).
n
]
[
#
Q
D
a
D
0
a
D
Q
D
1
]
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T
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D
]
[
Q
D
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1
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]
[
A
Q
N
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1
3
a
D
D
]
[
A
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a
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1
#
Y
B
0
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0
1
/
Y
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2
/
4
2
5
4
4
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S
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1
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N
0
A
/
N
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T
1
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1
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6
#
Q
D
a
D
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T
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1
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2
A
/
N
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N
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D
0
1
6
4
START
Read DQ[7:0]
at Valid Address (Note 1)
DQ[7] = Data
NO
YES
PROGRAM/ERASE
COMPLETE
DQ[5] = 1
NO
YES
Test for DQ[7] = 1
for Erase Operation
Read DQ[7:0]
at Valid Address (Note 1)
DQ[7] = Data
(Note 2)
NO
YES
Test for DQ[7] = 1
for Erase Operation
PROGRAM/ERASE
EXCEEDED TIME ERROR
Notes:
1. During
programming
, the program address. During
sector erase
, an
address within any non-protected sector specified for erasure. During
chip erase
, an address within any non-protected sector.
2. Recheck DQ[7] since it may change asynchronously to DQ[5].
Figure 7. Data# Polling Test Algorithm
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