參數(shù)資料
型號: HYB39S16400-1
廠商: SIEMENS AG
英文描述: 16 MBit Synchronous DRAM
中文描述: 16兆位同步DRAM
文件頁數(shù): 17/19頁
文件大小: 101K
代理商: HYB39S16400-1
HYB 39S16400/800/160CT-8/-10
16 MBit Synchronous DRAM
Semiconductor Group
17
1998-10-01
Notes for AC Parameters
1. For proper power-up see the operation section of this data sheet.
2. AC timing tests for LV-TTL versions have
V
IL
= 0.4 V and
V
IH
= 2.4 V with the timing referenced
to the 1.5 V crossover point. The transition time is measured between
V
IH
and
V
IL
. All AC
measurements assume
t
T
= 1 ns with the AC output load circuit shown in figure below. Specified
t
AC
and
t
OH
parameters are measured with a 50 pF only, without any resistive termination and
with a input signal of 1V/ s edge rate between 0.8 V and 2.0 V.
3. If clock rising time is longer than 1 ns, a time (
t
T
/2 - 0.5) ns has to be added to this parameter.
4. If tT is longer than 1 ns, a time (
t
T
-1) ns has to be added to this parameter.
5. These parameter account for the number of clock cycle and depend on the operating frequency
of the clock, as follows:
the number of clock cycle = specified value of timing period (counted in fractions as a whole
number)
Self Refresh Exit is a synchronous operation and begins on the 2nd positive clock edge after
CKE returns high. Self Refresh Exit is not complete until a time period equal to
t
RC
is satisfied
once the Self Refresh Exit command is registered.
50 pF
I/O
Measurement conditions for
t
AC
and
t
OH
SPT03404
CLOCK
2.4 V
0.4 V
INPUT
HOLD
t
SETUP
t
t
T
OUTPUT
1.4 V
t
LZ
AC
t
t
AC
OH
t
HZ
t
1.4 V
CL
t
CH
t
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