參數(shù)資料
型號(hào): HYB514100BJ-50
廠商: SIEMENS A G
元件分類: DRAM
英文描述: 4M x 1-Bit Dynamic RAM
中文描述: 4M X 1 FAST PAGE DRAM, 50 ns, PDSO20
封裝: 0.300 INCH, PLASTIC, SOJ-26
文件頁數(shù): 5/21頁
文件大?。?/td> 108K
代理商: HYB514100BJ-50
HYB 514100BJ-50/-60
4M
×
1 DRAM
Semiconductor Group
5
1998-10-01
Standby
V
CC
supply current
Average
V
CC
supply current during
CAS-before-RAS refresh mode
I
CC5
I
CC6
1
mA
1
-50 version
-60 version
120
110
mA
mA
2
Capacitance
T
A
= 0 to 70
°
C,
V
CC
= 5.0 V
± 10 %,
f
= 1 MHz
Parameter
Symbol
Limit Values
Unit
min.
max.
Input capacitance (A0 to A10, DI)
C
I1
C
I2
C
IO
5
pF
Input capacitance (RAS, CAS, WE)
7
pF
Output capacitance (DO)
7
pF
AC Characteristics
T
A
= 0 to 70
°
C,
V
CC
= 5 V
± 10 %,
t
T
= 5 ns
Parameter
5, 6
Symbol
Limit Values
Unit Note
-50
-60
min. max.
min.
max.
Common Parameters
Random read or write cycle time
t
RC
t
RP
t
RAS
t
CAS
t
ASR
t
RAH
t
ASC
t
CAH
t
RCD
t
RAD
t
RSH
t
CSH
95
110
ns
RAS precharge time
35
40
ns
RAS pulse width
50
10k
60
10k
ns
CAS pulse width
13
10k
15
10k
ns
Row address setup time
0
0
ns
Row address hold time
8
10
ns
Column address setup time
0
0
ns
Column address hold time
10
15
ns
RAS to CAS delay time
18
37
20
45
ns
RAS to column address delay time
13
25
15
30
ns
RAS hold time
13
15
ns
CAS hold time
50
60
ns
DC Characteristics
(cont’d)
T
A
= 0 to 70
°
C,
V
SS
= 0 V,
V
CC
= 5 10 %,
t
T
= 5 ns
Parameter
Symbol
Limit Values
Unit Test
Condition
min.
max.
相關(guān)PDF資料
PDF描述
HYB 514100BJ-50 4M × 1-Bit Dynamic RAM(4M × 1位動(dòng)態(tài)RAM)
HYB514100BJ-50- 4M x 1-Bit Dynamic RAM
HYB514100BJ-60 4M x 1-Bit Dynamic RAM
HYB 514171BJ-50 256k × 16-Bit Dynamic RAM(256k × 16位 動(dòng)態(tài) RAM)
HYB514171BJ-50 256k x 16-Bit Dynamic RAM
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參數(shù)描述
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