參數(shù)資料
型號: HYB514256BL-70
廠商: SIEMENS A G
元件分類: DRAM
英文描述: 256 K x 4-Bit Dynamic RAM Low Power 256 K x 4-Bit Dynamic RAM
中文描述: 256K X 4 FAST PAGE DRAM, 70 ns, PDIP20
文件頁數(shù): 8/22頁
文件大?。?/td> 215K
代理商: HYB514256BL-70
Semiconductor Group
62
HYB 514256B/BL/BJ/BJL-50/-60/-70
256 K
×
4-DRAM
Row address setup time
t
ASR
t
RAH
t
ASC
t
CAH
t
RAL
0
0
0
ns
Row address hold time
10
10
10
ns
Column address setup time
0
0
0
ns
Column address hold time
10
15
15
ns
Column address to RAS lead
time
25
30
35
ns
Read command setup time
t
RCS
0
0
0
ns
Read command hold time
8)
t
RCH
t
RRH
0
0
0
ns
Read command hold time
referenced to RAS
8)
0
0
0
ns
Write command hold time
t
WCH
t
WP
t
RWL
10
10
15
ns
Write command pulse width
10
10
15
ns
Write command to RAS lead
time
15
15
20
ns
Write command to CAS lead
time
t
CWL
15
15
20
ns
Data setup time
9)
t
DS
0
0
0
ns
Data hold time
9)
t
DH
10
15
15
ns
Refresh period
t
REF
t
REF
8
8
8
ms
Refresh period
L-version
Write command setup time
10)
t
WCS
CAS to WE delay time
64
64
ms
0
0
0
ns
10)
t
CWD
40
45
50
ns
RAS to WE delay time
10)
t
RWD
t
AWD
75
90
100
ns
Column address to WE delay
time
10)
50
60
65
ns
CAS setup time (CAS-before-
RAS cycle)
t
CSR
5
5
5
ns
CAS hold time (CAS-before-
RAS cycle)
t
CHR
10
15
15
ns
RAS to CAS precharge time
t
RPC
0
0
0
ns
AC Characteristics
(cont’d)
4) 13)
T
A
= 0 to 70 C;
V
CC
= 5 V
±
10 %;
t
T
= 5 ns
Parameter
Symbol
Limit Values
Unit
-50
-60
-70
min.
max.
min.
max.
min.
max.
相關PDF資料
PDF描述
HYB514256B-60 256 K x 4-Bit Dynamic RAM Low Power 256 K x 4-Bit Dynamic RAM
HYB514256B-70 256 K x 4-Bit Dynamic RAM Low Power 256 K x 4-Bit Dynamic RAM
HYB514256B 256 K x 4-Bit Dynamic RAM Low Power 256 K x 4-Bit Dynamic RAM
HYB514256B-50 256 K x 4-Bit Dynamic RAM Low Power 256 K x 4-Bit Dynamic RAM
HYB514265BJ-40 256K x 16-Bit EDO-Dynamic RAM
相關代理商/技術參數(shù)
參數(shù)描述
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