參數(shù)資料
型號: HYB514800BJ-80
廠商: SIEMENS A G
元件分類: DRAM
英文描述: 512kx8-Bit Dynamic RAM
中文描述: 512K X 8 FAST PAGE DRAM, 80 ns, PDSO28
文件頁數(shù): 1/22頁
文件大小: 211K
代理商: HYB514800BJ-80
Semiconductor Group
125
01.95
512kx8-Bit Dynamic RAM
Advanced Information
512 288 words by 8-bit organization
0 to 70 C operating temperature
Fast access and cycle time
RAS access time:
60 ns (-60 version)
70 ns (-70 version)
80 ns (-80 version)
CAS access time:
20 ns
Cycle time:
110 ns (-60 version)
130 ns (-70 version)
150 ns (-80 version)
Fast page mode cycle time
45 ns (-60 version)
45 ns (-70 version)
50 ns (-80 version)
Single + 5 V (
±
10 %) supply with a
built-in
V
bb
generator
Ordering Information
Type
Ordering Code
Package
Descriptions
HYB 514800BJ-60
Q67100-Q849
P-SOJ-28-2
DRAM
(access time 60 ns)
HYB 514800BJ-70
Q67100-Q850
P-SOJ-28-2
DRAM
(access time 70 ns)
HYB 514800BJ-80
Q67100-Q851
P-SOJ-28-2
DRAM
(access time 80 ns)
HYB 514800BJ -60/-70/-80
Low power dissipation
max. 605 mW active (-60 version)
max. 550 mW active (-70 version)
max. 468 mW active (-80 version)
Standby power dissipation:
11 mW standby standby (TTL)
5.5 mW max.standby (CMOS)
Output unlatched at cycle end allows two-
dimensional chip selection
Read, write, read-modify write, CAS-before-
RAS refresh, RAS-only refresh, hidden
refresh, fast page mode capability
All inputs and outputs TTL-compatible
1024 refresh cycles / 16 ms
Plastic Packages: P-SOJ-28-2 400 mil width
相關(guān)PDF資料
PDF描述
HYB514800BJ-70 512kx8-Bit Dynamic RAM
HYB514800BJ 512kx8-Bit Dynamic RAM
HYB514800BJ-60 512kx8-Bit Dynamic RAM
HYBRID-1998
HYBRID-CAPABILITIES Optoelectronic
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